module gate(x); output reg [15:0] x; if (1) begin : gen integer x; initial begin for (integer x = 5; x < 10; x++) if (x == 5) gen.x = 0; else gen.x += 2 ** x; x = x * 2; end end initial x = gen.x; endmodule module gold(x); output reg [15:0] x; if (1) begin : gen integer x; integer z; initial begin for (z = 5; z < 10; z++) if (z == 5) x = 0; else x += 2 ** z; x = x * 2; end end initial x = gen.x; endmodule s Git repository'/>
aboutsummaryrefslogtreecommitdiffstats
path: root/techlibs/ice40/tests/test_bram.v
blob: 320735d073e51c5aa75f7745b23092ae5e772f29 (plain) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24