From 849369d6c66d3054688672f97d31fceb8e8230fb Mon Sep 17 00:00:00 2001 From: root Date: Fri, 25 Dec 2015 04:40:36 +0000 Subject: initial_commit --- arch/arm/mach-msm/idle.S | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 arch/arm/mach-msm/idle.S (limited to 'arch/arm/mach-msm/idle.S') diff --git a/arch/arm/mach-msm/idle.S b/arch/arm/mach-msm/idle.S new file mode 100644 index 00000000..6a94f052 --- /dev/null +++ b/arch/arm/mach-msm/idle.S @@ -0,0 +1,36 @@ +/* arch/arm/mach-msm/include/mach/idle.S + * + * Idle processing for MSM7K - work around bugs with SWFI. + * + * Copyright (c) 2007 QUALCOMM Incorporated. + * Copyright (C) 2007 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include + +ENTRY(arch_idle) +#ifdef CONFIG_MSM7X00A_IDLE + mrc p15, 0, r1, c1, c0, 0 /* read current CR */ + bic r0, r1, #(1 << 2) /* clear dcache bit */ + bic r0, r0, #(1 << 12) /* clear icache bit */ + mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */ + + mov r0, #0 /* prepare wfi value */ + mcr p15, 0, r0, c7, c10, 0 /* flush the cache */ + mcr p15, 0, r0, c7, c10, 4 /* memory barrier */ + mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */ + + mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */ +#endif + mov pc, lr -- cgit v1.2.3