summaryrefslogtreecommitdiffstats
path: root/target/linux/ar7/patches-3.18/001-mips-ar7-fix-serial.patch
diff options
context:
space:
mode:
authorJohn Crispin <john@openwrt.org>2015-02-09 12:12:30 +0000
committerJohn Crispin <john@openwrt.org>2015-02-09 12:12:30 +0000
commit9f0f80faacff55e9e909b87328fc0def14290562 (patch)
treecc7d2b74e9645ac723ef45db443ff6b4b0aeda14 /target/linux/ar7/patches-3.18/001-mips-ar7-fix-serial.patch
parent5c8b8b36e1812feb055fc8574fe03156fa1efcb3 (diff)
downloadmaster-31e0f0ae-9f0f80faacff55e9e909b87328fc0def14290562.tar.gz
master-31e0f0ae-9f0f80faacff55e9e909b87328fc0def14290562.tar.bz2
master-31e0f0ae-9f0f80faacff55e9e909b87328fc0def14290562.zip
ar7: add 3.18 support
this is only compile tested Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 44344
Diffstat (limited to 'target/linux/ar7/patches-3.18/001-mips-ar7-fix-serial.patch')
-rw-r--r--target/linux/ar7/patches-3.18/001-mips-ar7-fix-serial.patch23
1 files changed, 23 insertions, 0 deletions
diff --git a/target/linux/ar7/patches-3.18/001-mips-ar7-fix-serial.patch b/target/linux/ar7/patches-3.18/001-mips-ar7-fix-serial.patch
new file mode 100644
index 0000000000..6896352266
--- /dev/null
+++ b/target/linux/ar7/patches-3.18/001-mips-ar7-fix-serial.patch
@@ -0,0 +1,23 @@
+From 443ab715a40881d6c9ba11b027ba154bac904cb0 Mon Sep 17 00:00:00 2001
+From: Oswald Buddenhagen <oswald.buddenhagen@gmx.de>
+Date: Sat, 10 May 2014 23:19:08 +0200
+Subject: [PATCH] MIPS/AR7: ensure that serial ports are properly set up
+
+without UPF_FIXED_TYPE, the data from the PORT_AR7 uart_config entry is
+never copied, resulting in a dead port.
+
+Signed-off-by: Oswald Buddenhagen <oswald.buddenhagen@gmx.de>
+---
+ arch/mips/ar7/platform.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/mips/ar7/platform.c
++++ b/arch/mips/ar7/platform.c
+@@ -581,6 +581,7 @@ static int __init ar7_register_uarts(voi
+ uart_port.type = PORT_AR7;
+ uart_port.uartclk = clk_get_rate(bus_clk) / 2;
+ uart_port.iotype = UPIO_MEM32;
++ uart_port.flags = UPF_FIXED_TYPE;
+ uart_port.regshift = 2;
+
+ uart_port.line = 0;