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author | Gabor Juhos <juhosg@openwrt.org> | 2013-01-07 14:30:37 +0000 |
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committer | Gabor Juhos <juhosg@openwrt.org> | 2013-01-07 14:30:37 +0000 |
commit | ba4de984b9272ee19790db80b6ed8ed7357094ce (patch) | |
tree | 8c4f68e7d9a051a9f2dd9aa1253fd46f19644e5e /target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c | |
parent | 251e4608b0e6ba7ff4dcc8547ac6f4090b00dbb8 (diff) | |
download | master-31e0f0ae-ba4de984b9272ee19790db80b6ed8ed7357094ce.tar.gz master-31e0f0ae-ba4de984b9272ee19790db80b6ed8ed7357094ce.tar.bz2 master-31e0f0ae-ba4de984b9272ee19790db80b6ed8ed7357094ce.zip |
ar71xx: disable PHY_SWAP and PHY_ADDR_SWAP bits on TL-WR703N/MR3020/MR3040/MR11U boards
The PHY_SWAP and PHY_ADDR_SWAP bits are initialized
differently by different versions of the bootloader.
This leads to broken ethernet connection with OpenWrt
on some boards.
Turn both SWAP bits OFF on these boards to make it
consistent regardless of the bootloader used.
Based on a patch by Michel Stempin <michel.stempin@wanadoo.fr>.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 35037
Diffstat (limited to 'target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c')
-rw-r--r-- | target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c index e0edbf8d7e..0a9dfbc8a0 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c @@ -100,7 +100,8 @@ static void __init tl_mr3020_setup(void) u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - ath79_setup_ar933x_phy4_switch(false, true); + /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ + ath79_setup_ar933x_phy4_switch(false, false); ath79_register_m25p80(&tl_mr3020_flash_data); ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3020_leds_gpio), @@ -118,7 +119,6 @@ static void __init tl_mr3020_setup(void) ath79_register_mdio(0, 0x0); ath79_register_eth(0); - ath79_eth0_data.phy_mask = BIT(0); ath79_register_wmac(ee, mac); } |