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author | Felix Fietkau <nbd@openwrt.org> | 2014-08-07 12:40:53 +0000 |
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committer | Felix Fietkau <nbd@openwrt.org> | 2014-08-07 12:40:53 +0000 |
commit | e41a0cafff16f2443e587884782172c6d8478771 (patch) | |
tree | 2ab441d85607622857c5d7602918d24312daa7ab /target/linux/ar71xx/patches-3.14/505-MIPS-ath79-add-ath79_gpio_function_select.patch | |
parent | f75f9606ad6af9f4c62acd45741a7e3880ad7dbb (diff) | |
download | master-31e0f0ae-e41a0cafff16f2443e587884782172c6d8478771.tar.gz master-31e0f0ae-e41a0cafff16f2443e587884782172c6d8478771.tar.bz2 master-31e0f0ae-e41a0cafff16f2443e587884782172c6d8478771.zip |
ar71xx: add linux 3.14 support
Signed-off-by: Zhao, Gang <gang.zhao.42@gmail.com>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 42038
Diffstat (limited to 'target/linux/ar71xx/patches-3.14/505-MIPS-ath79-add-ath79_gpio_function_select.patch')
-rw-r--r-- | target/linux/ar71xx/patches-3.14/505-MIPS-ath79-add-ath79_gpio_function_select.patch | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-3.14/505-MIPS-ath79-add-ath79_gpio_function_select.patch b/target/linux/ar71xx/patches-3.14/505-MIPS-ath79-add-ath79_gpio_function_select.patch new file mode 100644 index 0000000000..4c4c8914ee --- /dev/null +++ b/target/linux/ar71xx/patches-3.14/505-MIPS-ath79-add-ath79_gpio_function_select.patch @@ -0,0 +1,47 @@ +--- a/arch/mips/ath79/common.h ++++ b/arch/mips/ath79/common.h +@@ -27,6 +27,7 @@ void ath79_ddr_wb_flush(unsigned int reg + void ath79_gpio_function_enable(u32 mask); + void ath79_gpio_function_disable(u32 mask); + void ath79_gpio_function_setup(u32 set, u32 clear); ++void ath79_gpio_output_select(unsigned gpio, u8 val); + void ath79_gpio_init(void); + + #endif /* __ATH79_COMMON_H */ +--- a/arch/mips/ath79/gpio.c ++++ b/arch/mips/ath79/gpio.c +@@ -180,6 +180,34 @@ void ath79_gpio_function_disable(u32 mas + ath79_gpio_function_setup(0, mask); + } + ++void __init ath79_gpio_output_select(unsigned gpio, u8 val) ++{ ++ void __iomem *base = ath79_gpio_base; ++ unsigned long flags; ++ unsigned int reg; ++ u32 t, s; ++ ++ BUG_ON(!soc_is_ar934x()); ++ ++ if (gpio >= AR934X_GPIO_COUNT) ++ return; ++ ++ reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4); ++ s = 8 * (gpio % 4); ++ ++ spin_lock_irqsave(&ath79_gpio_lock, flags); ++ ++ t = __raw_readl(base + reg); ++ t &= ~(0xff << s); ++ t |= val << s; ++ __raw_writel(t, base + reg); ++ ++ /* flush write */ ++ (void) __raw_readl(base + reg); ++ ++ spin_unlock_irqrestore(&ath79_gpio_lock, flags); ++} ++ + void __init ath79_gpio_init(void) + { + int err; |