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| author | Florian Fainelli <florian@openwrt.org> | 2012-06-17 16:17:29 +0000 |
|---|---|---|
| committer | Florian Fainelli <florian@openwrt.org> | 2012-06-17 16:17:29 +0000 |
| commit | b89c81929e462e66e953dddd91429be49c69e439 (patch) | |
| tree | d28b9c6f06ca13f0fa3de8ff61328a3062bca55b /target/linux/brcm63xx/patches-3.3/311-MIPS-BCM63XX-add-MISC-register-set-definition.patch | |
| parent | 89701ec518741ab8a550eeb48e9d840abcab0dbb (diff) | |
| download | master-31e0f0ae-b89c81929e462e66e953dddd91429be49c69e439.tar.gz master-31e0f0ae-b89c81929e462e66e953dddd91429be49c69e439.tar.bz2 master-31e0f0ae-b89c81929e462e66e953dddd91429be49c69e439.zip | |
fix SPI message control handling for BCM6338/6348
BCM6338 and BCM6338 have their MSG_CONTROL register width of 8-bits instead of
16-bits. We were previously using a 16-bits write which corrupted the first
byte of the TX FIFO. Also the message type was always set to Full-duplex even
in the case of half-duplex messages.
SVN-Revision: 32409
Diffstat (limited to 'target/linux/brcm63xx/patches-3.3/311-MIPS-BCM63XX-add-MISC-register-set-definition.patch')
| -rw-r--r-- | target/linux/brcm63xx/patches-3.3/311-MIPS-BCM63XX-add-MISC-register-set-definition.patch | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/linux/brcm63xx/patches-3.3/311-MIPS-BCM63XX-add-MISC-register-set-definition.patch b/target/linux/brcm63xx/patches-3.3/311-MIPS-BCM63XX-add-MISC-register-set-definition.patch index 83ccf62b9c..8d2d9b9da1 100644 --- a/target/linux/brcm63xx/patches-3.3/311-MIPS-BCM63XX-add-MISC-register-set-definition.patch +++ b/target/linux/brcm63xx/patches-3.3/311-MIPS-BCM63XX-add-MISC-register-set-definition.patch @@ -90,7 +90,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> #endif /* ! BCM63XX_IO_H_ */ --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h -@@ -1116,4 +1116,14 @@ +@@ -1123,4 +1123,14 @@ #define TRNG_THRES 0x0c #define TRNG_MASK 0x10 |