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| author | Florian Fainelli <florian@openwrt.org> | 2012-06-17 16:17:29 +0000 |
|---|---|---|
| committer | Florian Fainelli <florian@openwrt.org> | 2012-06-17 16:17:29 +0000 |
| commit | b89c81929e462e66e953dddd91429be49c69e439 (patch) | |
| tree | d28b9c6f06ca13f0fa3de8ff61328a3062bca55b /target/linux/brcm63xx/patches-3.3/316-MIPS-BCM63XX-Add-PCIe-register-set-definitions.patch | |
| parent | 89701ec518741ab8a550eeb48e9d840abcab0dbb (diff) | |
| download | master-31e0f0ae-b89c81929e462e66e953dddd91429be49c69e439.tar.gz master-31e0f0ae-b89c81929e462e66e953dddd91429be49c69e439.tar.bz2 master-31e0f0ae-b89c81929e462e66e953dddd91429be49c69e439.zip | |
fix SPI message control handling for BCM6338/6348
BCM6338 and BCM6338 have their MSG_CONTROL register width of 8-bits instead of
16-bits. We were previously using a 16-bits write which corrupted the first
byte of the TX FIFO. Also the message type was always set to Full-duplex even
in the case of half-duplex messages.
SVN-Revision: 32409
Diffstat (limited to 'target/linux/brcm63xx/patches-3.3/316-MIPS-BCM63XX-Add-PCIe-register-set-definitions.patch')
| -rw-r--r-- | target/linux/brcm63xx/patches-3.3/316-MIPS-BCM63XX-Add-PCIe-register-set-definitions.patch | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/brcm63xx/patches-3.3/316-MIPS-BCM63XX-Add-PCIe-register-set-definitions.patch b/target/linux/brcm63xx/patches-3.3/316-MIPS-BCM63XX-Add-PCIe-register-set-definitions.patch index cabb9bd04b..b561bf143f 100644 --- a/target/linux/brcm63xx/patches-3.3/316-MIPS-BCM63XX-Add-PCIe-register-set-definitions.patch +++ b/target/linux/brcm63xx/patches-3.3/316-MIPS-BCM63XX-Add-PCIe-register-set-definitions.patch @@ -108,7 +108,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> #define bcm_memc_readl(o) bcm_rset_readl(RSET_MEMC, (o)) --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h -@@ -1163,6 +1163,9 @@ +@@ -1170,6 +1170,9 @@ /************************************************************************* * _REG relative to RSET_MISC *************************************************************************/ @@ -118,7 +118,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> #define MISC_STRAPBUS_6328_REG 0x240 #define STRAPBUS_6328_FCVO_SHIFT 7 -@@ -1170,4 +1173,55 @@ +@@ -1177,4 +1180,55 @@ #define STRAPBUS_6328_BOOT_SEL_SERIAL (1 << 28) #define STRAPBUS_6328_BOOT_SEL_NAND (0 << 28) |