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author | Luka Perkov <luka@openwrt.org> | 2016-01-18 06:43:48 +0000 |
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committer | Luka Perkov <luka@openwrt.org> | 2016-01-18 06:43:48 +0000 |
commit | c4de2dfd2d79021626acdbaefc6cc9c17eac35bf (patch) | |
tree | 7c66af2dac9f181d8e9c431ab9f73066de075f24 /target/linux/imx6/patches-4.3/203-net-igb-add-phy-read-write-functions-that-accept-phy.patch | |
parent | 85bdde7cf2821655c74fb4381926335a1161f0c1 (diff) | |
download | master-31e0f0ae-c4de2dfd2d79021626acdbaefc6cc9c17eac35bf.tar.gz master-31e0f0ae-c4de2dfd2d79021626acdbaefc6cc9c17eac35bf.tar.bz2 master-31e0f0ae-c4de2dfd2d79021626acdbaefc6cc9c17eac35bf.zip |
imx6: drop 4.3 support
Signed-off-by: Luka Perkov <luka@openwrt.org>
SVN-Revision: 48299
Diffstat (limited to 'target/linux/imx6/patches-4.3/203-net-igb-add-phy-read-write-functions-that-accept-phy.patch')
-rw-r--r-- | target/linux/imx6/patches-4.3/203-net-igb-add-phy-read-write-functions-that-accept-phy.patch | 260 |
1 files changed, 0 insertions, 260 deletions
diff --git a/target/linux/imx6/patches-4.3/203-net-igb-add-phy-read-write-functions-that-accept-phy.patch b/target/linux/imx6/patches-4.3/203-net-igb-add-phy-read-write-functions-that-accept-phy.patch deleted file mode 100644 index 9d19af5cd7..0000000000 --- a/target/linux/imx6/patches-4.3/203-net-igb-add-phy-read-write-functions-that-accept-phy.patch +++ /dev/null @@ -1,260 +0,0 @@ -From 16df7dc5901c1cb2a40f6adbd0d9423768ed8210 Mon Sep 17 00:00:00 2001 -From: Tim Harvey <tharvey@gateworks.com> -Date: Thu, 15 May 2014 00:29:18 -0700 -Subject: [PATCH] net: igb: add phy read/write functions that accept phy addr - -Add igb_write_reg_gs40g/igb_read_reg_gs40g that can be passed a phy address. -The existing igb_write_phy_reg_gs40g/igb_read_phy_reg_gs40g become wrappers -to this function. - -Signed-off-by: Tim Harvey <tharvey@gateworks.com> ---- - drivers/net/ethernet/intel/igb/e1000_82575.c | 4 +- - drivers/net/ethernet/intel/igb/e1000_phy.c | 74 +++++++++++++++++++--------- - drivers/net/ethernet/intel/igb/e1000_phy.h | 6 ++- - 3 files changed, 58 insertions(+), 26 deletions(-) - ---- a/drivers/net/ethernet/intel/igb/e1000_82575.c -+++ b/drivers/net/ethernet/intel/igb/e1000_82575.c -@@ -2153,7 +2153,7 @@ static s32 igb_read_phy_reg_82580(struct - if (ret_val) - goto out; - -- ret_val = igb_read_phy_reg_mdic(hw, offset, data); -+ ret_val = igb_read_phy_reg_mdic(hw, hw->phy.addr, offset, data); - - hw->phy.ops.release(hw); - -@@ -2178,7 +2178,7 @@ static s32 igb_write_phy_reg_82580(struc - if (ret_val) - goto out; - -- ret_val = igb_write_phy_reg_mdic(hw, offset, data); -+ ret_val = igb_write_phy_reg_mdic(hw, hw->phy.addr, offset, data); - - hw->phy.ops.release(hw); - ---- a/drivers/net/ethernet/intel/igb/e1000_phy.c -+++ b/drivers/net/ethernet/intel/igb/e1000_phy.c -@@ -126,9 +126,8 @@ out: - * Reads the MDI control regsiter in the PHY at offset and stores the - * information read to data. - **/ --s32 igb_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data) -+s32 igb_read_phy_reg_mdic(struct e1000_hw *hw, u8 addr, u32 offset, u16 *data) - { -- struct e1000_phy_info *phy = &hw->phy; - u32 i, mdicnfg, mdic = 0; - s32 ret_val = 0; - -@@ -147,14 +146,14 @@ s32 igb_read_phy_reg_mdic(struct e1000_h - case e1000_i211: - mdicnfg = rd32(E1000_MDICNFG); - mdicnfg &= ~(E1000_MDICNFG_PHY_MASK); -- mdicnfg |= (phy->addr << E1000_MDICNFG_PHY_SHIFT); -+ mdicnfg |= (addr << E1000_MDICNFG_PHY_SHIFT); - wr32(E1000_MDICNFG, mdicnfg); - mdic = ((offset << E1000_MDIC_REG_SHIFT) | - (E1000_MDIC_OP_READ)); - break; - default: - mdic = ((offset << E1000_MDIC_REG_SHIFT) | -- (phy->addr << E1000_MDIC_PHY_SHIFT) | -+ (addr << E1000_MDIC_PHY_SHIFT) | - (E1000_MDIC_OP_READ)); - break; - } -@@ -208,9 +207,8 @@ out: - * - * Writes data to MDI control register in the PHY at offset. - **/ --s32 igb_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data) -+s32 igb_write_phy_reg_mdic(struct e1000_hw *hw, u8 addr, u32 offset, u16 data) - { -- struct e1000_phy_info *phy = &hw->phy; - u32 i, mdicnfg, mdic = 0; - s32 ret_val = 0; - -@@ -229,7 +227,7 @@ s32 igb_write_phy_reg_mdic(struct e1000_ - case e1000_i211: - mdicnfg = rd32(E1000_MDICNFG); - mdicnfg &= ~(E1000_MDICNFG_PHY_MASK); -- mdicnfg |= (phy->addr << E1000_MDICNFG_PHY_SHIFT); -+ mdicnfg |= (addr << E1000_MDICNFG_PHY_SHIFT); - wr32(E1000_MDICNFG, mdicnfg); - mdic = (((u32)data) | - (offset << E1000_MDIC_REG_SHIFT) | -@@ -238,7 +236,7 @@ s32 igb_write_phy_reg_mdic(struct e1000_ - default: - mdic = (((u32)data) | - (offset << E1000_MDIC_REG_SHIFT) | -- (phy->addr << E1000_MDIC_PHY_SHIFT) | -+ (addr << E1000_MDIC_PHY_SHIFT) | - (E1000_MDIC_OP_WRITE)); - break; - } -@@ -458,7 +456,7 @@ s32 igb_read_phy_reg_igp(struct e1000_hw - goto out; - - if (offset > MAX_PHY_MULTI_PAGE_REG) { -- ret_val = igb_write_phy_reg_mdic(hw, -+ ret_val = igb_write_phy_reg_mdic(hw, hw->phy.addr, - IGP01E1000_PHY_PAGE_SELECT, - (u16)offset); - if (ret_val) { -@@ -467,8 +465,8 @@ s32 igb_read_phy_reg_igp(struct e1000_hw - } - } - -- ret_val = igb_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, -- data); -+ ret_val = igb_read_phy_reg_mdic(hw, hw->phy.addr, -+ MAX_PHY_REG_ADDRESS & offset, data); - - hw->phy.ops.release(hw); - -@@ -497,7 +495,7 @@ s32 igb_write_phy_reg_igp(struct e1000_h - goto out; - - if (offset > MAX_PHY_MULTI_PAGE_REG) { -- ret_val = igb_write_phy_reg_mdic(hw, -+ ret_val = igb_write_phy_reg_mdic(hw, hw->phy.addr, - IGP01E1000_PHY_PAGE_SELECT, - (u16)offset); - if (ret_val) { -@@ -506,8 +504,8 @@ s32 igb_write_phy_reg_igp(struct e1000_h - } - } - -- ret_val = igb_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, -- data); -+ ret_val = igb_write_phy_reg_mdic(hw, hw->phy.addr, -+ MAX_PHY_REG_ADDRESS & offset, data); - - hw->phy.ops.release(hw); - -@@ -2547,8 +2545,9 @@ out: - } - - /** -- * igb_write_phy_reg_gs40g - Write GS40G PHY register -+ * igb_write_reg_gs40g - Write GS40G PHY register - * @hw: pointer to the HW structure -+ * @addr: phy address to write to - * @offset: lower half is register offset to write to - * upper half is page to use. - * @data: data to write at register offset -@@ -2556,7 +2555,7 @@ out: - * Acquires semaphore, if necessary, then writes the data to PHY register - * at the offset. Release any acquired semaphores before exiting. - **/ --s32 igb_write_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 data) -+s32 igb_write_reg_gs40g(struct e1000_hw *hw, u8 addr, u32 offset, u16 data) - { - s32 ret_val; - u16 page = offset >> GS40G_PAGE_SHIFT; -@@ -2566,10 +2565,10 @@ s32 igb_write_phy_reg_gs40g(struct e1000 - if (ret_val) - return ret_val; - -- ret_val = igb_write_phy_reg_mdic(hw, GS40G_PAGE_SELECT, page); -+ ret_val = igb_write_phy_reg_mdic(hw, addr, GS40G_PAGE_SELECT, page); - if (ret_val) - goto release; -- ret_val = igb_write_phy_reg_mdic(hw, offset, data); -+ ret_val = igb_write_phy_reg_mdic(hw, addr, offset, data); - - release: - hw->phy.ops.release(hw); -@@ -2577,8 +2576,24 @@ release: - } - - /** -- * igb_read_phy_reg_gs40g - Read GS40G PHY register -+ * igb_write_phy_reg_gs40g - Write GS40G PHY register -+ * @hw: pointer to the HW structure -+ * @offset: lower half is register offset to write to -+ * upper half is page to use. -+ * @data: data to write at register offset -+ * -+ * Acquires semaphore, if necessary, then writes the data to PHY register -+ * at the offset. Release any acquired semaphores before exiting. -+ **/ -+s32 igb_write_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 data) -+{ -+ return igb_write_reg_gs40g(hw, hw->phy.addr, offset, data); -+} -+ -+/** -+ * igb_read_reg_gs40g - Read GS40G PHY register - * @hw: pointer to the HW structure -+ * @addr: phy address to read from - * @offset: lower half is register offset to read to - * upper half is page to use. - * @data: data to read at register offset -@@ -2586,7 +2601,7 @@ release: - * Acquires semaphore, if necessary, then reads the data in the PHY register - * at the offset. Release any acquired semaphores before exiting. - **/ --s32 igb_read_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 *data) -+s32 igb_read_reg_gs40g(struct e1000_hw *hw, u8 addr, u32 offset, u16 *data) - { - s32 ret_val; - u16 page = offset >> GS40G_PAGE_SHIFT; -@@ -2596,10 +2611,10 @@ s32 igb_read_phy_reg_gs40g(struct e1000_ - if (ret_val) - return ret_val; - -- ret_val = igb_write_phy_reg_mdic(hw, GS40G_PAGE_SELECT, page); -+ ret_val = igb_write_phy_reg_mdic(hw, addr, GS40G_PAGE_SELECT, page); - if (ret_val) - goto release; -- ret_val = igb_read_phy_reg_mdic(hw, offset, data); -+ ret_val = igb_read_phy_reg_mdic(hw, addr, offset, data); - - release: - hw->phy.ops.release(hw); -@@ -2607,6 +2622,21 @@ release: - } - - /** -+ * igb_read_phy_reg_gs40g - Read GS40G PHY register -+ * @hw: pointer to the HW structure -+ * @offset: lower half is register offset to read to -+ * upper half is page to use. -+ * @data: data to read at register offset -+ * -+ * Acquires semaphore, if necessary, then reads the data in the PHY register -+ * at the offset. Release any acquired semaphores before exiting. -+ **/ -+s32 igb_read_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 *data) -+{ -+ return igb_read_reg_gs40g(hw, hw->phy.addr, offset, data); -+} -+ -+/** - * igb_set_master_slave_mode - Setup PHY for Master/slave mode - * @hw: pointer to the HW structure - * ---- a/drivers/net/ethernet/intel/igb/e1000_phy.h -+++ b/drivers/net/ethernet/intel/igb/e1000_phy.h -@@ -62,8 +62,8 @@ void igb_power_up_phy_copper(struct e100 - void igb_power_down_phy_copper(struct e1000_hw *hw); - s32 igb_phy_init_script_igp3(struct e1000_hw *hw); - s32 igb_initialize_M88E1512_phy(struct e1000_hw *hw); --s32 igb_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data); --s32 igb_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data); -+s32 igb_read_phy_reg_mdic(struct e1000_hw *hw, u8 addr, u32 offset, u16 *data); -+s32 igb_write_phy_reg_mdic(struct e1000_hw *hw, u8 addr, u32 offset, u16 data); - s32 igb_read_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 *data); - s32 igb_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data); - s32 igb_read_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 *data); -@@ -73,6 +73,8 @@ s32 igb_phy_force_speed_duplex_82580(st - s32 igb_get_cable_length_82580(struct e1000_hw *hw); - s32 igb_read_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 *data); - s32 igb_write_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 data); -+s32 igb_read_reg_gs40g(struct e1000_hw *hw, u8 addr, u32 offset, u16 *data); -+s32 igb_write_reg_gs40g(struct e1000_hw *hw, u8 addr, u32 offset, u16 data); - s32 igb_check_polarity_m88(struct e1000_hw *hw); - - /* IGP01E1000 Specific Registers */ |