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author | Felix Fietkau <nbd@openwrt.org> | 2016-01-17 19:55:04 +0000 |
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committer | Felix Fietkau <nbd@openwrt.org> | 2016-01-17 19:55:04 +0000 |
commit | 1204a1b1e55a3d1e0ff7b0309c414fb0a1f38eda (patch) | |
tree | c0c982bf69fd4bd32431630a1a9cb4c31e79bdb6 /target/linux/lantiq/dts/danube.dtsi | |
parent | ee03fc430df227ecf79d84ccdfa6c30c0d3cad6f (diff) | |
download | master-31e0f0ae-1204a1b1e55a3d1e0ff7b0309c414fb0a1f38eda.tar.gz master-31e0f0ae-1204a1b1e55a3d1e0ff7b0309c414fb0a1f38eda.tar.bz2 master-31e0f0ae-1204a1b1e55a3d1e0ff7b0309c414fb0a1f38eda.zip |
lantiq: Use the new pinctrl compatible strings
These were introduced in upstream commit
be14811c03cf "pinctrl/lantiq: introduce new dedicated devicetree
bindings" and finally allow us to use the individual pins within our dts
(for example spi_clk, etc.).
Please note that this changes the number of GPIOs which are available for
some SoCs. VRX200 SoCs for example only have 50 pins, but previously 56
pins were exposed. This means that all places which are using hardcoded
GPIO numbers (which are not passed via device-tree) need to be adjusted
(because the first GPIO number is now 462, instead of 456).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48284
Diffstat (limited to 'target/linux/lantiq/dts/danube.dtsi')
-rw-r--r-- | target/linux/lantiq/dts/danube.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/linux/lantiq/dts/danube.dtsi b/target/linux/lantiq/dts/danube.dtsi index 698196d9ee..0a75fd9d45 100644 --- a/target/linux/lantiq/dts/danube.dtsi +++ b/target/linux/lantiq/dts/danube.dtsi @@ -123,7 +123,7 @@ }; gpio: pinmux@E100B10 { - compatible = "lantiq,pinctrl-xway"; + compatible = "lantiq,danube-pinctrl"; #gpio-cells = <2>; gpio-controller; reg = <0xE100B10 0xA0>; |