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| author | Gabor Juhos <juhosg@openwrt.org> | 2013-02-21 17:48:31 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2013-02-21 17:48:31 +0000 |
| commit | d785803bfa3e3690ac4ecb051aab47eb28fe70d7 (patch) | |
| tree | 786bd35720db98ffb90e694580d38df5dca179a1 /target/linux/mpc85xx/patches-3.8/110-fix_mpc8548_cds.patch | |
| parent | cf2324fd6b6752ce511b612fc192ab9f0b6a32cb (diff) | |
| download | master-31e0f0ae-d785803bfa3e3690ac4ecb051aab47eb28fe70d7.tar.gz master-31e0f0ae-d785803bfa3e3690ac4ecb051aab47eb28fe70d7.tar.bz2 master-31e0f0ae-d785803bfa3e3690ac4ecb051aab47eb28fe70d7.zip | |
mpc85xx: add support for 3.8
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 35729
Diffstat (limited to 'target/linux/mpc85xx/patches-3.8/110-fix_mpc8548_cds.patch')
| -rw-r--r-- | target/linux/mpc85xx/patches-3.8/110-fix_mpc8548_cds.patch | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/target/linux/mpc85xx/patches-3.8/110-fix_mpc8548_cds.patch b/target/linux/mpc85xx/patches-3.8/110-fix_mpc8548_cds.patch new file mode 100644 index 0000000000..3ca1bccec0 --- /dev/null +++ b/target/linux/mpc85xx/patches-3.8/110-fix_mpc8548_cds.patch @@ -0,0 +1,40 @@ +--- a/arch/powerpc/boot/dts/mpc8548cds_32b.dts ++++ b/arch/powerpc/boot/dts/mpc8548cds_32b.dts +@@ -75,6 +75,9 @@ + ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>; + }; + }; ++ chosen { ++ linux,stdout-path = "/soc8548@e0000000/serial@4600"; ++ }; + }; + + /* +--- a/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi ++++ b/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi +@@ -131,7 +131,24 @@ + + /include/ "pq3-i2c-0.dtsi" + /include/ "pq3-i2c-1.dtsi" +-/include/ "pq3-duart-0.dtsi" ++ ++ serial0: serial@4600 { ++ cell-index = <1>; ++ device_type = "serial"; ++ compatible = "fsl,ns16550", "ns16550"; ++ reg = <0x4600 0x100>; ++ clock-frequency = <0>; ++ interrupts = <42 2 0 0>; ++ }; ++ ++ serial1: serial@4500 { ++ cell-index = <0>; ++ device_type = "serial"; ++ compatible = "fsl,ns16550", "ns16550"; ++ reg = <0x4500 0x100>; ++ clock-frequency = <0>; ++ interrupts = <42 2 0 0>; ++ }; + + L2: l2-cache-controller@20000 { + compatible = "fsl,mpc8548-l2-cache-controller"; |