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| author | John Crispin <john@openwrt.org> | 2015-02-09 19:34:49 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2015-02-09 19:34:49 +0000 |
| commit | 07352ca2c725377b46e316e47b2bb4cb411b8135 (patch) | |
| tree | 6b3f2bfff672c19a74ee5dd9a865cb32e85ae8f1 /target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.h | |
| parent | 525cd8aedb33d26a8f38e6b553e8d83a47d73bcc (diff) | |
| download | master-31e0f0ae-07352ca2c725377b46e316e47b2bb4cb411b8135.tar.gz master-31e0f0ae-07352ca2c725377b46e316e47b2bb4cb411b8135.tar.bz2 master-31e0f0ae-07352ca2c725377b46e316e47b2bb4cb411b8135.zip | |
ralink: fix hw status almost full not work on mt7620 and mt7621
the old FE_INT_STATUS register becomes two registers.
FE_INT_STATUS and INT_STATUS. so the hw status almost full
must change to read from FE_INT_STATUS register.
tx/rx done read from INT_STATUS register.
mt7620 datasheet define CNT_GDM1_AF at BIT(29).
but after test it should be BIT(13). why?
Signed-off-by: michael lee <igvtee@gmail.com>
SVN-Revision: 44371
Diffstat (limited to 'target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.h')
| -rw-r--r-- | target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.h b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.h index a193a564c5..bf2a999f60 100644 --- a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.h +++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.h @@ -49,6 +49,7 @@ enum fe_reg { FE_REG_FE_DMA_VID_BASE, FE_REG_FE_COUNTER_BASE, FE_REG_FE_RST_GL, + FE_REG_FE_INT_STATUS2, FE_REG_COUNT }; @@ -407,6 +408,7 @@ struct fe_soc_data u32 pdma_glo_cfg; u32 rx_int; u32 tx_int; + u32 status_int; u32 checksum_bit; }; |