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authorJohn Crispin <john@openwrt.org>2015-12-11 15:02:50 +0000
committerJohn Crispin <john@openwrt.org>2015-12-11 15:02:50 +0000
commited8775d3c3cd257fe2967ca4b2d52d69ced47425 (patch)
treebc7337805b1852c2c0c8439ba1a8486059a06b11 /target/linux/ramips/patches-4.3/0058-backport-ensure-core-other-GCR-reflect-correct-core.patch
parente0d77e68cea4e2307cb17ae016609f1373adccbe (diff)
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ramips: backport series of patches that ensure GCRs of other CPUs are accessed properly
Signed-off-by: Nikolay Martynov <mar.kolya@gmail.com> SVN-Revision: 47838
Diffstat (limited to 'target/linux/ramips/patches-4.3/0058-backport-ensure-core-other-GCR-reflect-correct-core.patch')
-rw-r--r--target/linux/ramips/patches-4.3/0058-backport-ensure-core-other-GCR-reflect-correct-core.patch49
1 files changed, 49 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-4.3/0058-backport-ensure-core-other-GCR-reflect-correct-core.patch b/target/linux/ramips/patches-4.3/0058-backport-ensure-core-other-GCR-reflect-correct-core.patch
new file mode 100644
index 0000000000..e8ed6abf7f
--- /dev/null
+++ b/target/linux/ramips/patches-4.3/0058-backport-ensure-core-other-GCR-reflect-correct-core.patch
@@ -0,0 +1,49 @@
+commit 78a54c4d8e5a7915a4ec2ba0eb461fae50590683
+Author: Paul Burton <paul.burton@imgtec.com>
+Date: Tue Sep 22 11:12:18 2015 -0700
+
+ MIPS: CM, CPC: Ensure core-other GCRs reflect the correct core
+
+ Ensure the update to which core the core-other GCR regions reflect has
+ taken place before any core-other GCRs are accessed by placing a memory
+ barrier (sync instruction) between the write to the core-other registers
+ and any such GCR accesses.
+
+ Signed-off-by: Paul Burton <paul.burton@imgtec.com>
+ Cc: linux-mips@linux-mips.org
+ Cc: Bjorn Helgaas <bhelgaas@google.com>
+ Cc: linux-kernel@vger.kernel.org
+ Cc: Markos Chandras <markos.chandras@imgtec.com>
+ Patchwork: https://patchwork.linux-mips.org/patch/11209/
+ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
+
+--- a/arch/mips/kernel/mips-cm.c
++++ b/arch/mips/kernel/mips-cm.c
+@@ -278,6 +278,12 @@ void mips_cm_lock_other(unsigned int cor
+ }
+
+ write_gcr_cl_other(val);
++
++ /*
++ * Ensure the core-other region reflects the appropriate core &
++ * VP before any accesses to it occur.
++ */
++ mb();
+ }
+
+ void mips_cm_unlock_other(void)
+--- a/arch/mips/kernel/mips-cpc.c
++++ b/arch/mips/kernel/mips-cpc.c
+@@ -76,6 +76,12 @@ void mips_cpc_lock_other(unsigned int co
+ spin_lock_irqsave(&per_cpu(cpc_core_lock, curr_core),
+ per_cpu(cpc_core_lock_flags, curr_core));
+ write_cpc_cl_other(core << CPC_Cx_OTHER_CORENUM_SHF);
++
++ /*
++ * Ensure the core-other region reflects the appropriate core &
++ * VP before any accesses to it occur.
++ */
++ mb();
+ }
+
+ void mips_cpc_unlock_other(void)