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| author | Felix Fietkau <nbd@openwrt.org> | 2016-03-07 16:33:34 +0000 |
|---|---|---|
| committer | Felix Fietkau <nbd@openwrt.org> | 2016-03-07 16:33:34 +0000 |
| commit | d041e8b44b042d373b0b474ee69caed840f9a541 (patch) | |
| tree | 4255b83b60fd526a74b68b5b55cc0da54d3f7ab6 /target/linux/ramips/patches-4.4/0010-arch-mips-ralink-add-spi1-clocks.patch | |
| parent | e559de239715f629edc90b9a0afa57cb918b56ca (diff) | |
| download | master-31e0f0ae-d041e8b44b042d373b0b474ee69caed840f9a541.tar.gz master-31e0f0ae-d041e8b44b042d373b0b474ee69caed840f9a541.tar.bz2 master-31e0f0ae-d041e8b44b042d373b0b474ee69caed840f9a541.zip | |
ramips: add linux 4.4 support, update mt7621 subtarget to 4.4
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 48951
Diffstat (limited to 'target/linux/ramips/patches-4.4/0010-arch-mips-ralink-add-spi1-clocks.patch')
| -rw-r--r-- | target/linux/ramips/patches-4.4/0010-arch-mips-ralink-add-spi1-clocks.patch | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-4.4/0010-arch-mips-ralink-add-spi1-clocks.patch b/target/linux/ramips/patches-4.4/0010-arch-mips-ralink-add-spi1-clocks.patch new file mode 100644 index 0000000000..1c3db6b6d2 --- /dev/null +++ b/target/linux/ramips/patches-4.4/0010-arch-mips-ralink-add-spi1-clocks.patch @@ -0,0 +1,44 @@ +From 39ce22c870f4503bed5e451acfcab21eba3b6239 Mon Sep 17 00:00:00 2001 +From: John Crispin <blogic@openwrt.org> +Date: Sun, 27 Jul 2014 09:49:07 +0100 +Subject: [PATCH 10/53] arch: mips: ralink: add spi1 clocks + +based on f3bc64d6d1f21c1b92d75f233a37b75d77af6963 + +Signed-off-by: John Crispin <blogic@openwrt.org> +--- + arch/mips/ralink/mt7620.c | 1 + + arch/mips/ralink/rt305x.c | 1 + + arch/mips/ralink/rt3883.c | 1 + + 3 files changed, 3 insertions(+) + +--- a/arch/mips/ralink/mt7620.c ++++ b/arch/mips/ralink/mt7620.c +@@ -436,6 +436,7 @@ void __init ralink_clk_init(void) + ralink_clk_add("10000100.timer", periph_rate); + ralink_clk_add("10000120.watchdog", periph_rate); + ralink_clk_add("10000b00.spi", sys_rate); ++ ralink_clk_add("10000b40.spi", sys_rate); + ralink_clk_add("10000c00.uartlite", periph_rate); + ralink_clk_add("10180000.wmac", xtal_rate); + +--- a/arch/mips/ralink/rt305x.c ++++ b/arch/mips/ralink/rt305x.c +@@ -201,6 +201,7 @@ void __init ralink_clk_init(void) + ralink_clk_add("cpu", cpu_rate); + ralink_clk_add("sys", sys_rate); + ralink_clk_add("10000b00.spi", sys_rate); ++ ralink_clk_add("10000b40.spi", sys_rate); + ralink_clk_add("10000100.timer", wdt_rate); + ralink_clk_add("10000120.watchdog", wdt_rate); + ralink_clk_add("10000500.uart", uart_rate); +--- a/arch/mips/ralink/rt3883.c ++++ b/arch/mips/ralink/rt3883.c +@@ -109,6 +109,7 @@ void __init ralink_clk_init(void) + ralink_clk_add("10000120.watchdog", sys_rate); + ralink_clk_add("10000500.uart", 40000000); + ralink_clk_add("10000b00.spi", sys_rate); ++ ralink_clk_add("10000b40.spi", sys_rate); + ralink_clk_add("10000c00.uartlite", 40000000); + ralink_clk_add("10100000.ethernet", sys_rate); + ralink_clk_add("10180000.wmac", 40000000); |