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path: root/target/linux/ar71xx/patches-4.1/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch
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* ar71xx: Add QCA955X GPIO mux and function definitionsJohn Crispin2016-03-231-4/+4
| | | | | | Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com> SVN-Revision: 49075
* ar71xx: refresh patchesJohn Crispin2015-12-231-1/+1
| | | | | | Signed-off-by: Roman Yeryomin <roman@advem.lv> SVN-Revision: 47983
* ar71xx: update QCA956x supportJohn Crispin2015-12-231-44/+87
| | | | | | | | | | | - separate qca956x and tp9343 (they use different IDs) - rename qca9561->qca956x for consistency - add missing bits (device reset, gpio output select) - fix wmac setup Signed-off-by: Roman Yeryomin <roman@advem.lv> SVN-Revision: 47981
* ar71xx: use correct PLL configuration register bitmask for QCA956x SoC.Felix Fietkau2015-11-021-2/+2
| | | | | | | | | Incorrect value causes clock inaccuracy as huge as 1/60. Signed-off-by: Dmitry Ivanov <dima@ubnt.com> Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 47363
* ar71xx: fix ath79_soc_rev value for QCA9531 ver. 2John Crispin2015-10-261-7/+8
| | | | | | | | | | | | | | ath9k expects to get revision id 2 for the QCA9531 ver. 2 rev. 0. This fixes the very low TX power on some devices like the TP-LINK TL-WR841ND v10. As ath79_soc_rev is only used to get the revision number to ath9k on the QCA9533, just set it to the expected value on the ver. 2. Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net> Tested-by: Felix Kaechele <felix@kaechele.ca> SVN-Revision: 47262
* ar71xx: reorganize 4.1 patch directory layoutFelix Fietkau2015-07-191-0/+700
Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 46430