openwrt/em-br6478acv2/lede/master-31e0f0ae - Edimax BR-6578AC V2 base from https://github.com/ulli-kroll/lede.git

	Commit message (Collapse)	Author	Age	Files	Lines
*	kernel: update 4.1 to 4.1.10	Hauke Mehrtens	2015-10-04	1	-1/+1
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Fixes a regression on spi flash devices (upstream commit 1583eaece6fa). Changelogs: * https://www.kernel.org/pub/linux/kernel/v4.x/ChangeLog-4.1.7 * https://www.kernel.org/pub/linux/kernel/v4.x/ChangeLog-4.1.8 * https://www.kernel.org/pub/linux/kernel/v4.x/ChangeLog-4.1.9 * https://www.kernel.org/pub/linux/kernel/v4.x/ChangeLog-4.1.10 096-ipv4-off-by-one-in-continuation-handling-in-proc-net.patch was applied upstream and dropped. Signed-off-by: Mathias Kresin <openwrt@kresin.me> [update from 4.1.9 to 4.1.10] Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 47104
*	ar71xx: fix ar724x clock calculation	Felix Fietkau	2015-09-11	1	-0/+22
	According to the AR7242 datasheet section 2.8, AR724X CPUs use a 40MHz input clock as the REF_CLK instead of 5MHz. The correct CPU PLL calculation procedure is as follows: CPU_PLL = (DIV * REF_CLK) / REF_DIV / 2. This patch is compatible with the current calculation procedure with default DIV and REF_DIV values. Test on both AR7240, AR7241 and AR7242. Signed-off-by: Weijie Gao <hackpascal@gmail.com> SVN-Revision: 46856