summaryrefslogtreecommitdiffstats
path: root/target/linux/lantiq/patches-3.18
Commit message (Collapse)AuthorAgeFilesLines
* lantiq: fix ath_pci_fixup hang on bridged devicesJohn Crispin2015-10-051-1/+10
| | | | | | | | | | | | | | | | Port of r41856. In contrast to the brcm63xx target, it isn't sufficient to enable/disable the bridge. The device needs to be enabled/disabled to fix the hang. The bridge will be automatically enabled by the time the connected device is enabled. Fixes boot on TD-W8980. Signed-off-by: Mathias Kresin <openwrt@kresin.me> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 47129
* lantiq: Add AR9 compatibility bits to DWC2 driverJohn Crispin2015-09-141-2/+3
| | | | | | | | | | | | Add AR9 DTS definition to be recognized by the DWC2 driver. The same driver parameters can be mostly used except that some boards seem to erroneously report OTG HNP/SRP capability of the USB HCD. Forcing the HNP/SRP off allows these boards to work with the DWC2 as well. Signed-off-by: Antti Seppälä <a.seppala@gmail.com> SVN-Revision: 46915
* lantiq: Initialize USB on AR9 platformJohn Crispin2015-09-141-2/+3
| | | | | | | | | | Based on the ltq-hcd driver the AR9 USB can be initialized the same way as the VR9 platform. Use the same initialization bits for both platforms. Signed-off-by: Antti Seppälä <a.seppala@gmail.com> SVN-Revision: 46913
* lantiq: Use the BAR0 base address in the ath PCI fixup codeFelix Fietkau2015-09-111-4/+4
| | | | | | | | | | | Fixes support for AR9287 on TP-Link TD-W8980 and possibly other devices which have an ath wifi chip at a PCI address other than 0xb8000000 (TD-W8980 for example has it's wifi chip at 0xbc000000). Signed-off-by: Geoffrey McRae <geoff@spacevs.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 46869
* kernel: update 3.18 to 3.18.21Jonas Gorski2015-09-022-4/+4
| | | | | | | | | Changelog: * https://www.kernel.org/pub/linux/kernel/v3.x/ChangeLog-3.18.21 Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 46768
* lantiq: Support newer versions of the PEF7071 ethernet PHYsJohn Crispin2015-08-171-1/+1
| | | | | | | | | | The BT Home Hub 5A uses three PEF7071 with PHY ID 0xd565a401. Daniel's PHY driver (for his u-boot sources) already supports that PHY because it uses a PHY ID mask of 0xfffffff8. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 46670
* kernel: refresh patches on linux 3.18Hauke Mehrtens2015-07-122-2/+2
| | | | | | Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 46308
* lantiq: Silence the printk when a PCIe error interrupt arrivesJohn Crispin2015-07-071-1/+1
| | | | | | | | | | Basically the only error I am seeing is "Correctable Error". Also newer lantiq PCIe drivers have this message wrapped in a "if debug enabled" block. So it should be safe to disable this warning. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 46222
* lantiq: Change the data-type of mac address in ETOP driverJohn Crispin2015-07-072-10/+1
| | | | | | | | Make it consistent with the net_device struct and the xrx200 driver Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 46219
* kernel: update 3.18 to 3.18.17Jonas Gorski2015-06-301-1/+1
| | | | | | | | | Changelog: * https://www.kernel.org/pub/linux/kernel/v3.x/ChangeLog-3.18.17 Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 46150
* kernel: update 3.18 to 3.18.16Jonas Gorski2015-06-174-10/+8
| | | | | | | | | | | Changelogs: * https://www.kernel.org/pub/linux/kernel/v3.x/ChangeLog-3.18.15 * https://www.kernel.org/pub/linux/kernel/v3.x/ChangeLog-3.18.16 Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 46011
* lantiq: Backport gpio-stp-xway to fix the highest bits of the PHY LEDsJohn Crispin2015-06-051-0/+25
| | | | | | This fixes the LAN2 LED on Arcadyan VGV7510KW22. SVN-Revision: 45899
* lantiq: Fix initialization of the PCI IRQs when PCIe is also enabledJohn Crispin2015-05-231-18/+19
| | | | | | | | | | There are already ifx_pcie_bios_{map_irq,plat_dev_init} hooks defined in ifxmips_pcie.c. Instead of defining a new hook we simply re-use the existing ones (this is basically what the lantiq BSP code does). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 45718
* lantiq: Fix PCIe bus when PCI is also enabled.John Crispin2015-05-231-10/+10
| | | | | | | | | | | The PCIe bus seems to require a hack/workaround when PCI is enabled as well. Unfortunately this is guarded by an CONFIG_IFX_PCI ifdef, which is only defined in lantiq's BSP code. The config symbol for the upstream lantiq PCI driver is CONFIG_PCI_LANTIQ. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 45717
* kernel: update 3.18 to 3.18.14Jonas Gorski2015-05-213-7/+7
| | | | | | | | | | | | | | Changelogs: * https://www.kernel.org/pub/linux/kernel/v3.x/ChangeLog-3.18.12 * https://www.kernel.org/pub/linux/kernel/v3.x/ChangeLog-3.18.13 * https://www.kernel.org/pub/linux/kernel/v3.x/ChangeLog-3.18.14 Build tested on brcm63xx and ipq806x, runtested on brcm63xx. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 45711
* The ability to read MAC addresses from MTD is useful for other targets ↵Imre Kaloz2015-05-031-76/+0
| | | | | | | | besides ramips and lantiq as well. Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net> SVN-Revision: 45596
* lantiq: add a better fix to strip FCS from ethernet packets on XRX200Felix Fietkau2015-03-151-0/+25
| | | | | | Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 44771
* kenrel: refresh patchesJohn Crispin2015-03-119-268/+268
| | | | | | Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 44678
* lantiq: make the new dwc2 support only work for vr9John Crispin2015-03-111-4/+5
| | | | | | | | danube needs to be added Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 44677
* lantiq: Use platform endianness when accessing dwc2 registersJohn Crispin2015-03-111-0/+3184
| | | | | | | | | | | | | | | | | | | | This patch switches calls to readl/writel to their dwc2_readl/dwc2_writel equivalents which preserve platform endianness. This patch is necessary to access dwc2 registers correctly on big endian systems such as the mips based SoCs made by Lantiq. Then dwc2 can be used to replace ifx-hcd driver for Lantiq platforms found e.g. in OpenWrt. The patch was autogenerated with the following commands: $EDITOR core.h sed -i "s/\<readl\>/dwc2_readl/g" *.c hcd.h hw.h sed -i "s/\<writel\>/dwc2_writel/g" *.c hcd.h hw.h Signed-off-by: Antti Seppälä <a.seppala@gmail.com> Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com> SVN-Revision: 44675
* lantiq: Add sensible hw-defaults for dwc2John Crispin2015-03-111-0/+45
| | | | | | | | | | | Lantiq driver does not work with autodetected fifo sizes so use ones from original ltq-hcd driver in dwc2. Other values can be autodetected. Signed-off-by: Antti Seppälä <a.seppala@gmail.com> Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com> SVN-Revision: 44674
* lantiq: Configure gpio power output pin when initializing dwc2 usbJohn Crispin2015-03-111-0/+35
| | | | | | | | | Port gpio code from original ltq-hcd driver to dwc2. Signed-off-by: Antti Seppälä <a.seppala@gmail.com> Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com> SVN-Revision: 44673
* lantiq: Add usb initialization bits from ltq-hcd to platform initJohn Crispin2015-03-111-0/+95
| | | | | | | | | | | | | | Add VR9 specific usb initialization bits from ltq-hcd to platform initialization. This patch is more of a proof-of-concept than production quality since the initialization registers are different on other lantiq platforms. Signed-off-by: Antti Seppälä <a.seppala@gmail.com> Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com> SVN-Revision: 44672
* lantiq: disable buffered writes on Intel command set flashJohn Crispin2015-02-141-0/+11
| | | | | | | | | | | | Some Lantiq SoCs are not able to use buffered writes properly with Intel command set flash due to the way NOR addresses on EBU are manipulated. This patch disables buffered writes on those devices. The only device affected at the moment is ARV4510PW, others use AMD/Fujitsu command set. Signed-off-by: Matti Laakso <malaakso@elisanet.fi> SVN-Revision: 44451
* lantiq: Fix flash for targets with NO_XIPJohn Crispin2015-02-141-1/+1
| | | | | | | | | For targets with NO_XIP ltq_mtd->map[i].phys equals -1 and devm_ioremap fails. Fix this by using pdev->resource[i].start instead. Signed-off-by: Matti Laakso <malaakso@elisanet.fi> SVN-Revision: 44450
* lantiq: make m25p80 work againJohn Crispin2015-02-121-2/+10
| | | | | | Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 44421
* lantiq: fix mac addr assignment inside lantiq_etopJohn Crispin2015-02-121-6/+6
| | | | | | Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 44420
* lantiq: add 3.18 supportJohn Crispin2015-02-0939-0/+16556
Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 44348
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-17 06:54:11 +0000