From 48d81861a620c8c4a6a9ffc9a9438290330ec1fb Mon Sep 17 00:00:00 2001 From: Luka Perkov Date: Mon, 20 Apr 2015 20:47:53 +0000 Subject: ar71xx: refresh patches Signed-off-by: Luka Perkov SVN-Revision: 45528 --- .../patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch') diff --git a/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch b/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch index 1f6a4d23ba..09e911970a 100644 --- a/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch +++ b/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch @@ -22,7 +22,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. --- a/arch/mips/ath79/Kconfig +++ b/arch/mips/ath79/Kconfig -@@ -1174,6 +1174,10 @@ config SOC_AR934X +@@ -1184,6 +1184,10 @@ config SOC_AR934X select PCI_AR724X if PCI def_bool n @@ -33,7 +33,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. config SOC_QCA955X select HW_HAS_PCI select PCI_AR724X if PCI -@@ -1216,7 +1220,7 @@ config ATH79_DEV_USB +@@ -1226,7 +1230,7 @@ config ATH79_DEV_USB def_bool n config ATH79_DEV_WMAC -- cgit v1.2.3