From 9a65e1a5706a9ae9ed45761fa78c863e5b811642 Mon Sep 17 00:00:00 2001
From: Jonas Gorski <jogo@openwrt.org>
Date: Fri, 27 Feb 2015 17:39:07 +0000
Subject: brcm63xx: use dtb for cvg834g

Add a dtsi for bcm3368, add a dts and profile for cvg834g, and convert
it to use ImageDTB. Since HCS requires more arguments, enhance the max
arguments of the call.
The image name is intentionally left blank to prevent non-initramfs
images to be built, as they currently contain no rootfs and consequently
won't work.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>

SVN-Revision: 44561
---
 target/linux/brcm63xx/dts/bcm3368.dtsi | 75 ++++++++++++++++++++++++++++++++++
 1 file changed, 75 insertions(+)
 create mode 100644 target/linux/brcm63xx/dts/bcm3368.dtsi

(limited to 'target/linux/brcm63xx/dts/bcm3368.dtsi')

diff --git a/target/linux/brcm63xx/dts/bcm3368.dtsi b/target/linux/brcm63xx/dts/bcm3368.dtsi
new file mode 100644
index 0000000000..dba73b56cc
--- /dev/null
+++ b/target/linux/brcm63xx/dts/bcm3368.dtsi
@@ -0,0 +1,75 @@
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "brcm,bcm3368";
+
+	aliases {
+		pflash = &pflash;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			compatible = "brcm,bmips4350", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+		};
+
+		cpu@1 {
+			compatible = "brcm,bmips4350", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <1>;
+		};
+	};
+
+	cpu_intc: interrupt-controller {
+		#address-cells = <0>;
+		compatible = "mti,cpu-interrupt-controller";
+
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
+
+	memory { device_type = "memory"; reg = <0 0>; };
+
+	pflash: nor@1e000000 {
+		compatible = "cfi-flash";
+		reg = <0x1e000000 0x2000000>;
+		bank-width = <2>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		status = "disabled";
+	};
+
+	ubus@fff00000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		compatible = "simple-bus";
+
+		periph_intc: interrupt-controller@fff8c00c {
+			compatible = "brcm,bcm6345-periph-intc";
+			reg = <0xfffe000c 0x8>;
+
+			interrupt-controller;
+			#interrupt-cells = <1>;
+
+			interrupt-parent = <&cpu_intc>;
+			interrupts = <2>;
+		};
+
+		ext_intc0: interrupt-controller@fff8c014 {
+			compatible = "brcm,bcm6345-ext-intc";
+			reg = <0xfffe0014 0x4>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <24>, <25>, <26>, <27>;
+		};
+	};
+};
-- 
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