From e8068f0b1b4e53559ae0c58910b8905bee9b61ab Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Mon, 1 Dec 2014 00:52:07 +0000 Subject: brcm63xx: register interrupt-controllers through DT when possible Add the required nodes for the interrupt controllers and register them through DT when a DTB is present. Signed-off-by: Jonas Gorski SVN-Revision: 43457 --- target/linux/brcm63xx/dts/bcm63268.dtsi | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) (limited to 'target/linux/brcm63xx/dts/bcm63268.dtsi') diff --git a/target/linux/brcm63xx/dts/bcm63268.dtsi b/target/linux/brcm63xx/dts/bcm63268.dtsi index eafa74b6ac..214cd6266c 100644 --- a/target/linux/brcm63xx/dts/bcm63268.dtsi +++ b/target/linux/brcm63xx/dts/bcm63268.dtsi @@ -20,6 +20,14 @@ }; }; + cpu_intc: interrupt-controller { + #address-cells = <0>; + compatible = "mti,cpu-interrupt-controller"; + + interrupt-controller; + #interrupt-cells = <1>; + }; + memory { device_type = "memory"; reg = <0 0>; }; ubus@10000000 { @@ -27,5 +35,28 @@ #size-cells = <1>; ranges; compatible = "simple-bus"; + + ext_intc: interrupt-controller@10000018 { + compatible = "brcm,bcm6345-ext-intc"; + reg = <0x10000018 0x4>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&periph_intc>; + interrupts = <44>, <45>, <46>, <47>; + }; + + periph_intc: interrupt-controller@10000020 { + compatible = "brcm,bcm6345-l2-intc"; + reg = <0x10000020 0x20>, + <0x10000040 0x20>; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&cpu_intc>; + interrupts = <2>, <3>; + }; }; }; -- cgit v1.2.3