From e8068f0b1b4e53559ae0c58910b8905bee9b61ab Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Mon, 1 Dec 2014 00:52:07 +0000 Subject: brcm63xx: register interrupt-controllers through DT when possible Add the required nodes for the interrupt controllers and register them through DT when a DTB is present. Signed-off-by: Jonas Gorski SVN-Revision: 43457 --- target/linux/brcm63xx/dts/bcm6358.dtsi | 42 ++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) (limited to 'target/linux/brcm63xx/dts/bcm6358.dtsi') diff --git a/target/linux/brcm63xx/dts/bcm6358.dtsi b/target/linux/brcm63xx/dts/bcm6358.dtsi index b376cf01f3..a4af2144a8 100644 --- a/target/linux/brcm63xx/dts/bcm6358.dtsi +++ b/target/linux/brcm63xx/dts/bcm6358.dtsi @@ -24,6 +24,14 @@ }; }; + cpu_intc: interrupt-controller { + #address-cells = <0>; + compatible = "mti,cpu-interrupt-controller"; + + interrupt-controller; + #interrupt-cells = <1>; + }; + memory { device_type = "memory"; reg = <0 0>; }; pflash: nor@1e000000 { @@ -41,5 +49,39 @@ #size-cells = <1>; ranges; compatible = "simple-bus"; + + periph_intc: interrupt-controller@fffe000c { + compatible = "brcm,bcm6345-l2-intc"; + reg = <0xfffe000c 0x8>, + <0xfffe0038 0x8>; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&cpu_intc>; + interrupts = <2>, <3>; + }; + + ext_intc0: interrupt-controller@fffe0014 { + compatible = "brcm,bcm6345-ext-intc"; + reg = <0xfffe0014 0x4>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&periph_intc>; + interrupts = <25>, <26>, <27>, <28>; + }; + + ext_intc1: interrupt-controller@fffe001c { + compatible = "brcm,bcm6345-ext-intc"; + reg = <0xfffe001c 0x4>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&periph_intc>; + interrupts = <20>, <21>; + }; }; }; -- cgit v1.2.3