--- a/arch/mips/include/asm/mach-ralink/mt7621.h
+++ b/arch/mips/include/asm/mach-ralink/mt7621.h
@@ -13,6 +13,9 @@
 #ifndef _MT7621_REGS_H_
 #define _MT7621_REGS_H_
 
+#define MT7621_PALMBUS_BASE		0x1C000000
+#define MT7621_PALMBUS_SIZE		0x03FFFFFF
+
 #define MT7621_SYSC_BASE		0x1E000000
 
 #define SYSC_REG_CHIP_NAME0		0x00
--- a/arch/mips/ralink/mt7621.c
+++ b/arch/mips/ralink/mt7621.c
@@ -204,6 +204,21 @@ void prom_soc_init(struct ralink_soc_inf
 	mips_cm_probe();
 	mips_cpc_probe();
 
+	if (mips_cm_numiocu()) {
+		/* mips_cm_probe() wipes out bootloader
+		   config for CM regions and we have to configure them
+		   again. This SoC cannot talk to pamlbus devices
+		   witout proper iocu region set up.
+
+		   FIXME: it would be better to do this with values
+		   from DT, but we need this very early because
+		   without this we cannot talk to pretty much anything
+		   including serial.
+		*/
+		write_gcr_reg0_base(MT7621_PALMBUS_BASE);
+		write_gcr_reg0_mask(~MT7621_PALMBUS_SIZE | CM_GCR_REGn_MASK_CMTGT_IOCU0);
+	}
+
 	if (!register_cps_smp_ops())
 		return;
 	if (!register_cmp_smp_ops())