diff options
Diffstat (limited to 'target')
| -rw-r--r-- | target/linux/mpc85xx/image/Makefile | 2 | ||||
| -rw-r--r-- | target/linux/mpc85xx/patches-3.10/150-dts-p1010rdb-pa.patch | 87 |
2 files changed, 88 insertions, 1 deletions
diff --git a/target/linux/mpc85xx/image/Makefile b/target/linux/mpc85xx/image/Makefile index 0f8373ad52..dcb2620a67 100644 --- a/target/linux/mpc85xx/image/Makefile +++ b/target/linux/mpc85xx/image/Makefile @@ -21,7 +21,7 @@ endef zImage:=$(BIN_DIR)/$(IMG_PREFIX)-zImage -DTS_TARGETS = mpc8548cds_32b p1010rdb tl-wdr4900-v1 p1020rdb +DTS_TARGETS = mpc8548cds_32b p1010rdb-pa tl-wdr4900-v1 p1020rdb BOOT_IMAGES:=zImage cuImage.tl-wdr4900-v1 define Image/Prepare diff --git a/target/linux/mpc85xx/patches-3.10/150-dts-p1010rdb-pa.patch b/target/linux/mpc85xx/patches-3.10/150-dts-p1010rdb-pa.patch new file mode 100644 index 0000000000..0d2f0b9c32 --- /dev/null +++ b/target/linux/mpc85xx/patches-3.10/150-dts-p1010rdb-pa.patch @@ -0,0 +1,87 @@ +From 41ec72d74b9453cd0d4b60d188ae894b8bdc4ca6 Mon Sep 17 00:00:00 2001 +From: Heiner Kallweit <hkallweit1@gmail.com> +Date: Thu, 20 Nov 2014 18:33:47 +0100 +Subject: [PATCH] create dts target p1010rdb-pa + With kernel 3.14 dts target p1010rdb was renamed to p1010rdb-pa. + Create a copy of p1010rdb.dts to maintain compatibility. + +--- + arch/powerpc/boot/dts/p1010rdb-pa.dts | 66 +++++++++++++++++++++++++++++++++++ + 1 file changed, 66 insertions(+) + create mode 100644 arch/powerpc/boot/dts/p1010rdb-pa.dts + +diff --git a/arch/powerpc/boot/dts/p1010rdb-pa.dts b/arch/powerpc/boot/dts/p1010rdb-pa.dts +new file mode 100644 +index 0000000..b868d22 +--- /dev/null ++++ b/arch/powerpc/boot/dts/p1010rdb-pa.dts +@@ -0,0 +1,66 @@ ++/* ++ * P1010 RDB Device Tree Source ++ * ++ * Copyright 2011 Freescale Semiconductor Inc. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ */ ++ ++/include/ "fsl/p1010si-pre.dtsi" ++ ++/ { ++ model = "fsl,P1010RDB"; ++ compatible = "fsl,P1010RDB"; ++ ++ memory { ++ device_type = "memory"; ++ }; ++ ++ board_ifc: ifc: ifc@ffe1e000 { ++ /* NOR, NAND Flashes and CPLD on board */ ++ ranges = <0x0 0x0 0x0 0xee000000 0x02000000 ++ 0x1 0x0 0x0 0xff800000 0x00010000 ++ 0x3 0x0 0x0 0xffb00000 0x00000020>; ++ reg = <0x0 0xffe1e000 0 0x2000>; ++ }; ++ ++ board_soc: soc: soc@ffe00000 { ++ ranges = <0x0 0x0 0xffe00000 0x100000>; ++ }; ++ ++ pci0: pcie@ffe09000 { ++ reg = <0 0xffe09000 0 0x1000>; ++ ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 ++ 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; ++ pcie@0 { ++ ranges = <0x2000000 0x0 0xa0000000 ++ 0x2000000 0x0 0xa0000000 ++ 0x0 0x20000000 ++ ++ 0x1000000 0x0 0x0 ++ 0x1000000 0x0 0x0 ++ 0x0 0x100000>; ++ }; ++ }; ++ ++ pci1: pcie@ffe0a000 { ++ reg = <0 0xffe0a000 0 0x1000>; ++ ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 ++ 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; ++ pcie@0 { ++ ranges = <0x2000000 0x0 0x80000000 ++ 0x2000000 0x0 0x80000000 ++ 0x0 0x20000000 ++ ++ 0x1000000 0x0 0x0 ++ 0x1000000 0x0 0x0 ++ 0x0 0x100000>; ++ }; ++ }; ++}; ++ ++/include/ "p1010rdb.dtsi" ++/include/ "fsl/p1010si-post.dtsi" +-- +2.1.3 + |