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| author | Pavel Kubelun <be.dissent@gmail.com> | 2017-06-15 03:45:17 -0400 |
|---|---|---|
| committer | Felix Fietkau <nbd@nbd.name> | 2018-01-17 11:02:05 +0100 |
| commit | a4c1767897cb063ad0d8932f686b751e0f085c72 (patch) | |
| tree | a0d9f8a253895d899735b607e32cd71dc6a0bd17 | |
| parent | 7903a9219c7eb5d14c62f79d4a70f5cab1c6294f (diff) | |
| download | upstream-a4c1767897cb063ad0d8932f686b751e0f085c72.tar.gz upstream-a4c1767897cb063ad0d8932f686b751e0f085c72.tar.bz2 upstream-a4c1767897cb063ad0d8932f686b751e0f085c72.zip | |
Revert "ipq8064: Fix dwc3 module unloading"
Preparing for proper fixes thus reverting commits:
- 8db079a9ff1756059250b801617a20baba214684 "ipq8064: Fix dwc3 module unloading"
- c75f059b0c4d09dd0da60e14c4933a9f645266d1 "ipq8064: Fix dwc3 module unloading"
Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
| -rw-r--r-- | target/linux/ipq806x/patches-4.9/0032-phy-add-qcom-dwc3-phy.patch | 14 |
1 files changed, 3 insertions, 11 deletions
diff --git a/target/linux/ipq806x/patches-4.9/0032-phy-add-qcom-dwc3-phy.patch b/target/linux/ipq806x/patches-4.9/0032-phy-add-qcom-dwc3-phy.patch index a15a0d3a9c..c91d0a99f4 100644 --- a/target/linux/ipq806x/patches-4.9/0032-phy-add-qcom-dwc3-phy.patch +++ b/target/linux/ipq806x/patches-4.9/0032-phy-add-qcom-dwc3-phy.patch @@ -39,7 +39,7 @@ Signed-off-by: Andy Gross <agross@codeaurora.org> +obj-$(CONFIG_PHY_QCOM_DWC3) += phy-qcom-dwc3.o --- /dev/null +++ b/drivers/phy/phy-qcom-dwc3.c -@@ -0,0 +1,492 @@ +@@ -0,0 +1,484 @@ +/* Copyright (c) 2014-2015, Code Aurora Forum. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify @@ -99,7 +99,7 @@ Signed-off-by: Andy Gross <agross@codeaurora.org> + +/* PHY_CTRL_REG */ +#define SSUSB_CTRL_REF_USE_PAD BIT(28) -+#define SSUSB_CTRL_TEST_POWERDOWN BIT(26) ++#define SSUSB_CTRL_TEST_POWERDOWN BIT(27) +#define SSUSB_CTRL_LANE0_PWR_PRESENT BIT(24) +#define SSUSB_CTRL_SS_PHY_EN BIT(8) +#define SSUSB_CTRL_SS_PHY_RESET BIT(7) @@ -331,14 +331,6 @@ Signed-off-by: Andy Gross <agross@codeaurora.org> + + /* reset phy */ + data = readl(phy_dwc3->base + SSUSB_PHY_CTRL_REG); -+ -+ /* Test and clear SSUSB_CTRL_TEST_POWERDOWN */ -+ if (data & SSUSB_CTRL_TEST_POWERDOWN) { -+ qcom_dwc3_phy_write_readback(phy_dwc3, SSUSB_PHY_CTRL_REG, -+ SSUSB_CTRL_TEST_POWERDOWN, 0x0); -+ data = readl(phy_dwc3->base + SSUSB_PHY_CTRL_REG); -+ } -+ + writel(data | SSUSB_CTRL_SS_PHY_RESET, + phy_dwc3->base + SSUSB_PHY_CTRL_REG); + usleep_range(2000, 2200); @@ -428,7 +420,7 @@ Signed-off-by: Andy Gross <agross@codeaurora.org> + qcom_dwc3_phy_write_readback(phy_dwc3, SSUSB_PHY_CTRL_REG, + SSUSB_CTRL_REF_USE_PAD, 0x0); + qcom_dwc3_phy_write_readback(phy_dwc3, SSUSB_PHY_CTRL_REG, -+ SSUSB_CTRL_TEST_POWERDOWN, SSUSB_CTRL_TEST_POWERDOWN); ++ 0x0, SSUSB_CTRL_TEST_POWERDOWN); + + return 0; +} |