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| author | Yangbo Lu <yangbo.lu@nxp.com> | 2020-07-30 13:12:43 +0800 |
|---|---|---|
| committer | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2021-02-19 15:29:46 +0100 |
| commit | 80dcd14abeed8cd808b92bb307964dbaeb252144 (patch) | |
| tree | 93e33a02dfdfd0f01775309afa1cbbde6200c321 /package/boot/uboot-layerscape/files/fsl_lx2160a-rdb-sdboot-uEnv.txt | |
| parent | f59d7aab2a374d27abfdc50348d855db5560db8f (diff) | |
| download | upstream-80dcd14abeed8cd808b92bb307964dbaeb252144.tar.gz upstream-80dcd14abeed8cd808b92bb307964dbaeb252144.tar.bz2 upstream-80dcd14abeed8cd808b92bb307964dbaeb252144.zip | |
layerscape: add LX2160ARDB (Rev2.0 silicon) board support
The QorIQ LX2160A reference design board provides a comprehensive platform
that enables design and evaluation of the LX2160A processor.
- Enables network intelligence with the next generation Datapath (DPPA2)
which provides differentiated offload and a rich set of IO, including
10GE, 25GE, 40GE, and PCIe Gen4
- Delivers unprecedented efficiency and new virtualized networks
- Supports designs in 5G packet processing, network function
virtualization, storage controller, white box switching, network
interface cards, and mobile edge computing
- Supports all three LX2 family members (16-core LX2160A; 12-core LX2120A;
and 8-core LX2080A)
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
[use AUTORELEASE, add dtb to firmware part]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Diffstat (limited to 'package/boot/uboot-layerscape/files/fsl_lx2160a-rdb-sdboot-uEnv.txt')
| -rw-r--r-- | package/boot/uboot-layerscape/files/fsl_lx2160a-rdb-sdboot-uEnv.txt | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/package/boot/uboot-layerscape/files/fsl_lx2160a-rdb-sdboot-uEnv.txt b/package/boot/uboot-layerscape/files/fsl_lx2160a-rdb-sdboot-uEnv.txt new file mode 100644 index 0000000000..6b4e920c9e --- /dev/null +++ b/package/boot/uboot-layerscape/files/fsl_lx2160a-rdb-sdboot-uEnv.txt @@ -0,0 +1,9 @@ +fdtaddr=0x8f000000 +loadaddr=0x81000000 +bootm_size=0x10000000 +hwconfig=fsl_ddr:bank_intlv=auto +mc_init=mmc read 80000000 5000 1800;mmc read 80300000 7000 800;fsl_mc start mc 80000000 80300000;mmc read 80400000 6800 800;fsl_mc apply dpl 80400000 +sd_boot=ext4load mmc 0:1 ${loadaddr} fitImage;bootm ${loadaddr} +bootargs=root=/dev/mmcblk0p2 rw rootwait rootfstype=squashfs,f2fs noinitrd earlycon=pl011,mmio32,0x21c0000 console=ttyAMA0,115200 +bootcmd=echo starting openwrt ...;run mc_init;run sd_boot +bootdelay=3 |