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authorNick Hainke <vincent@systemli.org>2023-05-04 21:13:33 +0200
committerChristian Marangi <ansuelsmth@gmail.com>2023-05-12 13:02:43 +0200
commit1d3e71bd9710593cc0d7216b0ce9898b8e89aeef (patch)
treec323be1fef7f797cdcd97d980f40246c2602015e /target/linux/at91/patches-5.10/224-ARM-dts-at91-sama7g5-add-ram-controllers.patch
parent397ba0b54b22454104e57af98bd95db2fb80c50e (diff)
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treewide: remove files for building 5.10 kernel
All targets are bumped to 5.15. Remove the old 5.10 patches, configs and files using: find target/linux -iname '*-5.10' -exec rm -r {} \; Further, remove the 5.10 include. Signed-off-by: Nick Hainke <vincent@systemli.org>
Diffstat (limited to 'target/linux/at91/patches-5.10/224-ARM-dts-at91-sama7g5-add-ram-controllers.patch')
-rw-r--r--target/linux/at91/patches-5.10/224-ARM-dts-at91-sama7g5-add-ram-controllers.patch36
1 files changed, 0 insertions, 36 deletions
diff --git a/target/linux/at91/patches-5.10/224-ARM-dts-at91-sama7g5-add-ram-controllers.patch b/target/linux/at91/patches-5.10/224-ARM-dts-at91-sama7g5-add-ram-controllers.patch
deleted file mode 100644
index 11c0f2c1e3..0000000000
--- a/target/linux/at91/patches-5.10/224-ARM-dts-at91-sama7g5-add-ram-controllers.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From cf96a88e44f1fde9f1a30ab335329ff9e895e6f8 Mon Sep 17 00:00:00 2001
-From: Claudiu Beznea <claudiu.beznea@microchip.com>
-Date: Mon, 23 Aug 2021 16:19:13 +0300
-Subject: [PATCH 224/247] ARM: dts: at91: sama7g5: add ram controllers
-
-Add RAM and RAMC PHY controllers. These are necessary for platform
-specific power management code.
-
-Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
-Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
-Link: https://lore.kernel.org/r/20210823131915.23857-3-claudiu.beznea@microchip.com
----
- arch/arm/boot/dts/sama7g5.dtsi | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
---- a/arch/arm/boot/dts/sama7g5.dtsi
-+++ b/arch/arm/boot/dts/sama7g5.dtsi
-@@ -515,6 +515,18 @@
- };
- };
-
-+ uddrc: uddrc@e3800000 {
-+ compatible = "microchip,sama7g5-uddrc";
-+ reg = <0xe3800000 0x4000>;
-+ status = "okay";
-+ };
-+
-+ ddr3phy: ddr3phy@e3804000 {
-+ compatible = "microchip,sama7g5-ddr3phy";
-+ reg = <0xe3804000 0x1000>;
-+ status = "okay";
-+ };
-+
- gic: interrupt-controller@e8c11000 {
- compatible = "arm,cortex-a7-gic";
- #interrupt-cells = <3>;