aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/bcm27xx/patches-5.15/950-0859-clk-bcm-rpi-Set-a-default-minimum-rate.patch
diff options
context:
space:
mode:
authorÁlvaro Fernández Rojas <noltari@gmail.com>2022-05-16 23:40:32 +0200
committerÁlvaro Fernández Rojas <noltari@gmail.com>2022-05-17 15:11:22 +0200
commit20ea6adbf199097c4f5f591ffee088340630dae4 (patch)
treed6719d95e136611a1c25bbf7789652d6d402779d /target/linux/bcm27xx/patches-5.15/950-0859-clk-bcm-rpi-Set-a-default-minimum-rate.patch
parentbca05bd072180dc38ef740b37ded9572a6db1981 (diff)
downloadupstream-20ea6adbf199097c4f5f591ffee088340630dae4.tar.gz
upstream-20ea6adbf199097c4f5f591ffee088340630dae4.tar.bz2
upstream-20ea6adbf199097c4f5f591ffee088340630dae4.zip
bcm27xx: add support for linux v5.15
Build system: x86_64 Build-tested: bcm2708, bcm2709, bcm2710, bcm2711 Run-tested: bcm2708/RPiB+, bcm2709/RPi3B, bcm2710/RPi3B, bcm2711/RPi4B Signed-off-by: Marty Jones <mj8263788@gmail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Diffstat (limited to 'target/linux/bcm27xx/patches-5.15/950-0859-clk-bcm-rpi-Set-a-default-minimum-rate.patch')
-rw-r--r--target/linux/bcm27xx/patches-5.15/950-0859-clk-bcm-rpi-Set-a-default-minimum-rate.patch69
1 files changed, 69 insertions, 0 deletions
diff --git a/target/linux/bcm27xx/patches-5.15/950-0859-clk-bcm-rpi-Set-a-default-minimum-rate.patch b/target/linux/bcm27xx/patches-5.15/950-0859-clk-bcm-rpi-Set-a-default-minimum-rate.patch
new file mode 100644
index 0000000000..dfa68383d5
--- /dev/null
+++ b/target/linux/bcm27xx/patches-5.15/950-0859-clk-bcm-rpi-Set-a-default-minimum-rate.patch
@@ -0,0 +1,69 @@
+From ac0b202c0bae166810c63e2ac5067b6ea3f4af43 Mon Sep 17 00:00:00 2001
+From: Maxime Ripard <maxime@cerno.tech>
+Date: Mon, 17 Jan 2022 17:31:06 +0100
+Subject: [PATCH] clk: bcm: rpi: Set a default minimum rate
+
+The M2MC clock provides the state machine clock for both HDMI
+controllers.
+
+However, if no HDMI monitor is plugged in at boot, its clock rate will
+be left at 0 by the firmware and will make any register access end up in
+a CPU stall, even though the clock was enabled.
+
+We had some code in the HDMI controller to deal with this before, but it
+makes more sense to have it in the clock driver. Move it there.
+
+Signed-off-by: Maxime Ripard <maxime@cerno.tech>
+---
+ drivers/clk/bcm/clk-raspberrypi.c | 26 ++++++++++++++++++++++++++
+ 1 file changed, 26 insertions(+)
+
+--- a/drivers/clk/bcm/clk-raspberrypi.c
++++ b/drivers/clk/bcm/clk-raspberrypi.c
+@@ -78,6 +78,7 @@ struct raspberrypi_clk_data {
+ struct raspberrypi_clk_variant {
+ bool export;
+ char *clkdev;
++ unsigned long min_rate;
+ };
+
+ static struct raspberrypi_clk_variant
+@@ -91,6 +92,18 @@ raspberrypi_clk_variants[RPI_FIRMWARE_NU
+ },
+ [RPI_FIRMWARE_M2MC_CLK_ID] = {
+ .export = true,
++
++ /*
++ * If we boot without any cable connected to any of the
++ * HDMI connector, the firmware will skip the HSM
++ * initialization and leave it with a rate of 0,
++ * resulting in a bus lockup when we're accessing the
++ * registers even if it's enabled.
++ *
++ * Let's put a sensible default so that we don't end up
++ * in this situation.
++ */
++ .min_rate = 120000000,
+ },
+ [RPI_FIRMWARE_V3D_CLK_ID] = {
+ .export = true,
+@@ -278,6 +291,19 @@ static struct clk_hw *raspberrypi_clk_re
+ }
+ }
+
++ if (variant->min_rate) {
++ unsigned long rate;
++
++ clk_hw_set_rate_range(&data->hw, variant->min_rate, max_rate);
++
++ rate = raspberrypi_fw_get_rate(&data->hw, 0);
++ if (rate < variant->min_rate) {
++ ret = raspberrypi_fw_set_rate(&data->hw, variant->min_rate, 0);
++ if (ret)
++ return ERR_PTR(ret);
++ }
++ }
++
+ return &data->hw;
+ }
+