bcm4908: backport v6.4 pending DTS changes

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>

1 files changed, 367 insertions, 0 deletions

diff --git a/target/linux/bcm4908/patches-5.15/036-v6.4-0001-arm64-dts-broadcom-bcmbca-Add-spi-controller-node.patch b/target/linux/bcm4908/patches-5.15/036-v6.4-0001-arm64-dts-broadcom-bcmbca-Add-spi-controller-node.patch
new file mode 100644
index 0000000000..e8e1228179
--- /dev/null
+++ b/target/linux/bcm4908/patches-5.15/036-v6.4-0001-arm64-dts-broadcom-bcmbca-Add-spi-controller-node.patch
@@ -0,0 +1,367 @@
+From f5d83b714e304d5f3229da434af2eeea033c4f5d Mon Sep 17 00:00:00 2001
+From: William Zhang <william.zhang@broadcom.com>
+Date: Mon, 6 Feb 2023 22:58:15 -0800
+Subject: [PATCH] arm64: dts: broadcom: bcmbca: Add spi controller node
+
+Add support for HSSPI controller in ARMv8 chip dts files.
+
+Signed-off-by: William Zhang <william.zhang@broadcom.com>
+Link: https://lore.kernel.org/r/20230207065826.285013-5-william.zhang@broadcom.com
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ .../boot/dts/broadcom/bcmbca/bcm4908.dtsi     | 18 +++++++++++++++++
+ .../boot/dts/broadcom/bcmbca/bcm4912.dtsi     | 20 +++++++++++++++++++
+ .../boot/dts/broadcom/bcmbca/bcm63146.dtsi    | 19 ++++++++++++++++++
+ .../boot/dts/broadcom/bcmbca/bcm63158.dtsi    | 19 ++++++++++++++++++
+ .../boot/dts/broadcom/bcmbca/bcm6813.dtsi     | 20 +++++++++++++++++++
+ .../boot/dts/broadcom/bcmbca/bcm6856.dtsi     | 18 +++++++++++++++++
+ .../boot/dts/broadcom/bcmbca/bcm6858.dtsi     | 18 +++++++++++++++++
+ .../boot/dts/broadcom/bcmbca/bcm94908.dts     |  4 ++++
+ .../boot/dts/broadcom/bcmbca/bcm94912.dts     |  4 ++++
+ .../boot/dts/broadcom/bcmbca/bcm963146.dts    |  4 ++++
+ .../boot/dts/broadcom/bcmbca/bcm963158.dts    |  4 ++++
+ .../boot/dts/broadcom/bcmbca/bcm96813.dts     |  4 ++++
+ .../boot/dts/broadcom/bcmbca/bcm96856.dts     |  4 ++++
+ .../boot/dts/broadcom/bcmbca/bcm96858.dts     |  4 ++++
+ 14 files changed, 160 insertions(+)
+
+--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+@@ -107,6 +107,12 @@
+ 			clock-frequency = <50000000>;
+ 			clock-output-names = "periph";
+ 		};
++
++		hsspi_pll: hsspi-pll {
++			compatible = "fixed-clock";
++			#clock-cells = <0>;
++			clock-frequency = <400000000>;
++		};
+ 	};
+ 
+ 	soc {
+@@ -531,6 +537,18 @@
+ 			#size-cells = <0>;
+ 		};
+ 
++		hsspi: spi@1000{
++			#address-cells = <1>;
++			#size-cells = <0>;
++			compatible = "brcm,bcm4908-hsspi", "brcm,bcmbca-hsspi-v1.0";
++			reg = <0x1000 0x600>;
++			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&hsspi_pll &hsspi_pll>;
++			clock-names = "hsspi", "pll";
++			num-cs = <8>;
++			status = "disabled";
++		};
++
+ 		nand-controller@1800 {
+ 			#address-cells = <1>;
+ 			#size-cells = <0>;
+--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
+@@ -79,6 +79,7 @@
+ 			#clock-cells = <0>;
+ 			clock-frequency = <200000000>;
+ 		};
++
+ 		uart_clk: uart-clk {
+ 			compatible = "fixed-factor-clock";
+ 			#clock-cells = <0>;
+@@ -86,6 +87,12 @@
+ 			clock-div = <4>;
+ 			clock-mult = <1>;
+ 		};
++
++		hsspi_pll: hsspi-pll {
++			compatible = "fixed-clock";
++			#clock-cells = <0>;
++			clock-frequency = <200000000>;
++		};
+ 	};
+ 
+ 	psci {
+@@ -117,6 +124,19 @@
+ 		#size-cells = <1>;
+ 		ranges = <0x0 0x0 0xff800000 0x800000>;
+ 
++		hsspi: spi@1000 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			compatible = "brcm,bcm4912-hsspi", "brcm,bcmbca-hsspi-v1.1";
++			reg = <0x1000 0x600>, <0x2610 0x4>;
++			reg-names = "hsspi", "spim-ctrl";
++			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&hsspi_pll &hsspi_pll>;
++			clock-names = "hsspi", "pll";
++			num-cs = <8>;
++			status = "disabled";
++		};
++
+ 		uart0: serial@12000 {
+ 			compatible = "arm,pl011", "arm,primecell";
+ 			reg = <0x12000 0x1000>;
+--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi
++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi
+@@ -60,6 +60,7 @@
+ 			#clock-cells = <0>;
+ 			clock-frequency = <200000000>;
+ 		};
++
+ 		uart_clk: uart-clk {
+ 			compatible = "fixed-factor-clock";
+ 			#clock-cells = <0>;
+@@ -67,6 +68,12 @@
+ 			clock-div = <4>;
+ 			clock-mult = <1>;
+ 		};
++
++		hsspi_pll: hsspi-pll {
++			compatible = "fixed-clock";
++			#clock-cells = <0>;
++			clock-frequency = <200000000>;
++		};
+ 	};
+ 
+ 	psci {
+@@ -99,6 +106,18 @@
+ 		#size-cells = <1>;
+ 		ranges = <0x0 0x0 0xff800000 0x800000>;
+ 
++		hsspi: spi@1000 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			compatible = "brcm,bcm63146-hsspi", "brcm,bcmbca-hsspi-v1.0";
++			reg = <0x1000 0x600>;
++			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&hsspi_pll &hsspi_pll>;
++			clock-names = "hsspi", "pll";
++			num-cs = <8>;
++			status = "disabled";
++		};
++
+ 		uart0: serial@12000 {
+ 			compatible = "arm,pl011", "arm,primecell";
+ 			reg = <0x12000 0x1000>;
+--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
+@@ -79,6 +79,7 @@
+ 			#clock-cells = <0>;
+ 			clock-frequency = <200000000>;
+ 		};
++
+ 		uart_clk: uart-clk {
+ 			compatible = "fixed-factor-clock";
+ 			#clock-cells = <0>;
+@@ -86,6 +87,12 @@
+ 			clock-div = <4>;
+ 			clock-mult = <1>;
+ 		};
++
++		hsspi_pll: hsspi-pll {
++			compatible = "fixed-clock";
++			#clock-cells = <0>;
++			clock-frequency = <400000000>;
++		};
+ 	};
+ 
+ 	psci {
+@@ -117,6 +124,18 @@
+ 		#size-cells = <1>;
+ 		ranges = <0x0 0x0 0xff800000 0x800000>;
+ 
++		hsspi: spi@1000 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			compatible = "brcm,bcm63158-hsspi", "brcm,bcmbca-hsspi-v1.0";
++			reg = <0x1000 0x600>;
++			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&hsspi_pll &hsspi_pll>;
++			clock-names = "hsspi", "pll";
++			num-cs = <8>;
++			status = "disabled";
++		};
++
+ 		uart0: serial@12000 {
+ 			compatible = "arm,pl011", "arm,primecell";
+ 			reg = <0x12000 0x1000>;
+--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi
++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi
+@@ -79,6 +79,7 @@
+ 			#clock-cells = <0>;
+ 			clock-frequency = <200000000>;
+ 		};
++
+ 		uart_clk: uart-clk {
+ 			compatible = "fixed-factor-clock";
+ 			#clock-cells = <0>;
+@@ -86,6 +87,12 @@
+ 			clock-div = <4>;
+ 			clock-mult = <1>;
+ 		};
++
++		hsspi_pll: hsspi-pll {
++			compatible = "fixed-clock";
++			#clock-cells = <0>;
++			clock-frequency = <200000000>;
++		};
+ 	};
+ 
+ 	psci {
+@@ -117,6 +124,19 @@
+ 		#size-cells = <1>;
+ 		ranges = <0x0 0x0 0xff800000 0x800000>;
+ 
++		hsspi: spi@1000 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			compatible = "brcm,bcm6813-hsspi", "brcm,bcmbca-hsspi-v1.1";
++			reg = <0x1000 0x600>, <0x2610 0x4>;
++			reg-names = "hsspi", "spim-ctrl";
++			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&hsspi_pll &hsspi_pll>;
++			clock-names = "hsspi", "pll";
++			num-cs = <8>;
++			status = "disabled";
++		};
++
+ 		uart0: serial@12000 {
+ 			compatible = "arm,pl011", "arm,primecell";
+ 			reg = <0x12000 0x1000>;
+--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
+@@ -60,6 +60,12 @@
+ 			#clock-cells = <0>;
+ 			clock-frequency = <200000000>;
+ 		};
++
++		hsspi_pll: hsspi-pll {
++			compatible = "fixed-clock";
++			#clock-cells = <0>;
++			clock-frequency = <400000000>;
++		};
+ 	};
+ 
+ 	psci {
+@@ -100,5 +106,17 @@
+ 			clock-names = "refclk";
+ 			status = "disabled";
+ 		};
++
++		hsspi: spi@1000 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			compatible = "brcm,bcm6856-hsspi", "brcm,bcmbca-hsspi-v1.0";
++			reg = <0x1000 0x600>;
++			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&hsspi_pll &hsspi_pll>;
++			clock-names = "hsspi", "pll";
++			num-cs = <8>;
++			status = "disabled";
++		};
+ 	};
+ };
+--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
+@@ -78,6 +78,12 @@
+ 			#clock-cells = <0>;
+ 			clock-frequency = <200000000>;
+ 		};
++
++		hsspi_pll: hsspi-pll {
++			compatible = "fixed-clock";
++			#clock-cells = <0>;
++			clock-frequency = <400000000>;
++		};
+ 	};
+ 
+ 	psci {
+@@ -137,5 +143,17 @@
+ 			clock-names = "refclk";
+ 			status = "disabled";
+ 		};
++
++		hsspi: spi@1000 {
++			#address-cells = <1>;
++			#size-cells = <0>;
++			compatible = "brcm,bcm6858-hsspi", "brcm,bcmbca-hsspi-v1.0";
++			reg = <0x1000 0x600>;
++			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&hsspi_pll &hsspi_pll>;
++			clock-names = "hsspi", "pll";
++			num-cs = <8>;
++			status = "disabled";
++		};
+ 	};
+ };
+--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts
++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts
+@@ -28,3 +28,7 @@
+ &uart0 {
+ 	status = "okay";
+ };
++
++&hsspi {
++	status = "okay";
++};
+--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
+@@ -28,3 +28,7 @@
+ &uart0 {
+ 	status = "okay";
+ };
++
++&hsspi {
++	status = "okay";
++};
+--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts
++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts
+@@ -28,3 +28,7 @@
+ &uart0 {
+ 	status = "okay";
+ };
++
++&hsspi {
++	status = "okay";
++};
+--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts
++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts
+@@ -28,3 +28,7 @@
+ &uart0 {
+ 	status = "okay";
+ };
++
++&hsspi {
++	status = "okay";
++};
+--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts
++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts
+@@ -28,3 +28,7 @@
+ &uart0 {
+ 	status = "okay";
+ };
++
++&hsspi {
++	status = "okay";
++};
+--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts
++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts
+@@ -28,3 +28,7 @@
+ &uart0 {
+ 	status = "okay";
+ };
++
++&hsspi {
++	status = "okay";
++};
+--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
++++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
+@@ -28,3 +28,7 @@
+ &uart0 {
+ 	status = "okay";
+ };
++
++&hsspi {
++	status = "okay";
++};