brcm2708: update to latest patches from RPi Foundation

Also removes reverted patches.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>

1 files changed, 189 insertions, 0 deletions

diff --git a/target/linux/brcm2708/patches-4.19/950-0558-ARM-dts-bcm283x-Move-BCM2835-6-7-specific-to-bcm2835.patch b/target/linux/brcm2708/patches-4.19/950-0558-ARM-dts-bcm283x-Move-BCM2835-6-7-specific-to-bcm2835.patch
new file mode 100644
index 0000000000..e3ee39abba
--- /dev/null
+++ b/target/linux/brcm2708/patches-4.19/950-0558-ARM-dts-bcm283x-Move-BCM2835-6-7-specific-to-bcm2835.patch
@@ -0,0 +1,189 @@
+From 545c00748a070340e9669740e45afc2672e1fcb6 Mon Sep 17 00:00:00 2001
+From: Stefan Wahren <wahrenst@gmx.net>
+Date: Sun, 19 May 2019 12:26:21 +0200
+Subject: [PATCH] ARM: dts: bcm283x: Move BCM2835/6/7 specific to
+ bcm2835-common.dtsi
+
+We want all common BCM2835/6/7/8 functions in bcm283x.dtsi and all
+BCM2835/6/7 specific in the new bcm2835-common.dtsi.
+
+Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
+---
+ arch/arm/boot/dts/bcm2835-common.dtsi | 53 +++++++++++++++++++++++++++
+ arch/arm/boot/dts/bcm2835.dtsi        |  1 +
+ arch/arm/boot/dts/bcm2836.dtsi        |  1 +
+ arch/arm/boot/dts/bcm2837.dtsi        |  1 +
+ arch/arm/boot/dts/bcm283x.dtsi        | 43 +---------------------
+ 5 files changed, 57 insertions(+), 42 deletions(-)
+ create mode 100644 arch/arm/boot/dts/bcm2835-common.dtsi
+
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm2835-common.dtsi
+@@ -0,0 +1,53 @@
++// SPDX-License-Identifier: GPL-2.0
++
++/* This include file covers the common peripherals and configuration between
++ * bcm2835, bcm2836 and bcm2837 implementations.
++ */
++
++/ {
++	soc {
++		timer@7e003000 {
++			compatible = "brcm,bcm2835-system-timer";
++			reg = <0x7e003000 0x1000>;
++			interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
++			/* This could be a reference to BCM2835_CLOCK_TIMER,
++			 * but we don't have the driver using the common clock
++			 * support yet.
++			 */
++			clock-frequency = <1000000>;
++		};
++
++		intc: interrupt-controller@7e00b200 {
++			compatible = "brcm,bcm2835-armctrl-ic";
++			reg = <0x7e00b200 0x200>;
++			interrupt-controller;
++			#interrupt-cells = <2>;
++		};
++
++		thermal: thermal@7e212000 {
++			compatible = "brcm,bcm2835-thermal";
++			reg = <0x7e212000 0x8>;
++			clocks = <&clocks BCM2835_CLOCK_TSENS>;
++			#thermal-sensor-cells = <0>;
++			status = "disabled";
++		};
++
++		v3d: v3d@7ec00000 {
++			compatible = "brcm,bcm2835-v3d";
++			reg = <0x7ec00000 0x1000>;
++			interrupts = <1 10>;
++		};
++	};
++};
++
++&gpio {
++	i2c_slave_gpio18: i2c_slave_gpio18 {
++		brcm,pins = <18 19 20 21>;
++		brcm,function = <BCM2835_FSEL_ALT3>;
++	};
++
++	jtag_gpio4: jtag_gpio4 {
++		brcm,pins = <4 5 6 12 13>;
++		brcm,function = <BCM2835_FSEL_ALT5>;
++	};
++};
+--- a/arch/arm/boot/dts/bcm2835.dtsi
++++ b/arch/arm/boot/dts/bcm2835.dtsi
+@@ -1,5 +1,6 @@
+ // SPDX-License-Identifier: GPL-2.0
+ #include "bcm283x.dtsi"
++#include "bcm2835-common.dtsi"
+ 
+ / {
+ 	compatible = "brcm,bcm2835";
+--- a/arch/arm/boot/dts/bcm2836.dtsi
++++ b/arch/arm/boot/dts/bcm2836.dtsi
+@@ -1,5 +1,6 @@
+ // SPDX-License-Identifier: GPL-2.0
+ #include "bcm283x.dtsi"
++#include "bcm2835-common.dtsi"
+ 
+ / {
+ 	compatible = "brcm,bcm2836";
+--- a/arch/arm/boot/dts/bcm2837.dtsi
++++ b/arch/arm/boot/dts/bcm2837.dtsi
+@@ -1,4 +1,5 @@
+ #include "bcm283x.dtsi"
++#include "bcm2835-common.dtsi"
+ 
+ / {
+ 	compatible = "brcm,bcm2837";
+--- a/arch/arm/boot/dts/bcm283x.dtsi
++++ b/arch/arm/boot/dts/bcm283x.dtsi
+@@ -55,17 +55,6 @@
+ 		#address-cells = <1>;
+ 		#size-cells = <1>;
+ 
+-		timer@7e003000 {
+-			compatible = "brcm,bcm2835-system-timer";
+-			reg = <0x7e003000 0x1000>;
+-			interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
+-			/* This could be a reference to BCM2835_CLOCK_TIMER,
+-			 * but we don't have the driver using the common clock
+-			 * support yet.
+-			 */
+-			clock-frequency = <1000000>;
+-		};
+-
+ 		txp@7e004000 {
+ 			compatible = "brcm,bcm2835-txp";
+ 			reg = <0x7e004000 0x20>;
+@@ -113,13 +102,6 @@
+ 			brcm,dma-channel-mask = <0x7f35>;
+ 		};
+ 
+-		intc: interrupt-controller@7e00b200 {
+-			compatible = "brcm,bcm2835-armctrl-ic";
+-			reg = <0x7e00b200 0x200>;
+-			interrupt-controller;
+-			#interrupt-cells = <2>;
+-		};
+-
+ 		watchdog@7e100000 {
+ 			compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
+ 			#power-domain-cells = <1>;
+@@ -183,8 +165,7 @@
+ 			interrupt-controller;
+ 			#interrupt-cells = <2>;
+ 
+-			/* Defines pin muxing groups according to
+-			 * BCM2835-ARM-Peripherals.pdf page 102.
++			/* Defines common pin muxing groups
+ 			 *
+ 			 * While each pin can have its mux selected
+ 			 * for various functions individually, some
+@@ -262,15 +243,7 @@
+ 				brcm,pins = <44 45>;
+ 				brcm,function = <BCM2835_FSEL_ALT2>;
+ 			};
+-			i2c_slave_gpio18: i2c_slave_gpio18 {
+-				brcm,pins = <18 19 20 21>;
+-				brcm,function = <BCM2835_FSEL_ALT3>;
+-			};
+ 
+-			jtag_gpio4: jtag_gpio4 {
+-				brcm,pins = <4 5 6 12 13>;
+-				brcm,function = <BCM2835_FSEL_ALT5>;
+-			};
+ 			jtag_gpio22: jtag_gpio22 {
+ 				brcm,pins = <22 23 24 25 26 27>;
+ 				brcm,function = <BCM2835_FSEL_ALT4>;
+@@ -487,14 +460,6 @@
+ 
+ 		};
+ 
+-		thermal: thermal@7e212000 {
+-			compatible = "brcm,bcm2835-thermal";
+-			reg = <0x7e212000 0x8>;
+-			clocks = <&clocks BCM2835_CLOCK_TSENS>;
+-			#thermal-sensor-cells = <0>;
+-			status = "disabled";
+-		};
+-
+ 		aux: aux@7e215000 {
+ 			compatible = "brcm,bcm2835-aux";
+ 			#clock-cells = <1>;
+@@ -660,12 +625,6 @@
+ 			phy-names = "usb2-phy";
+ 		};
+ 
+-		v3d: v3d@7ec00000 {
+-			compatible = "brcm,bcm2835-v3d";
+-			reg = <0x7ec00000 0x1000>;
+-			interrupts = <1 10>;
+-		};
+-
+ 		vc4: gpu {
+ 			compatible = "brcm,bcm2835-vc4";
+ 		};