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| author | Linus Walleij <linus.walleij@linaro.org> | 2019-03-11 19:16:42 +0100 |
|---|---|---|
| committer | Christian Lamparter <chunkeey@gmail.com> | 2019-03-13 16:25:36 +0100 |
| commit | b907097291af843f714139999c32107463b2ef4a (patch) | |
| tree | ddfd26ce31ae1ea80d7b905b2f464460a3018002 /target/linux/generic/files | |
| parent | ee34740ca3f90a5359392d629544e4520030e52e (diff) | |
| download | upstream-b907097291af843f714139999c32107463b2ef4a.tar.gz upstream-b907097291af843f714139999c32107463b2ef4a.tar.bz2 upstream-b907097291af843f714139999c32107463b2ef4a.zip | |
kernel: mtdsplit: wrgg: Support big and little endian
The WRGG images exist in both big and little endian variants,
as can be seen from the image generator in
tools/firmware-utils/src/mkwrggimg.c, you either pass
the "-b" flag or not. The D-Link DIR-685 is using little
endian images so we need to support splitting these.
Detect endianness like this: if the kernel entity size
gets silly big (bigger than the flash memory) we are
probably using the wrong endianness.
Example: my kernel of 0x0067ff64 was switched around by
wrong endianness and detected as 0x64ff67a0 (the actual
size in swapped endianness + header 0xa0).
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Diffstat (limited to 'target/linux/generic/files')
| -rw-r--r-- | target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_wrgg.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_wrgg.c b/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_wrgg.c index 5ce7625731..6c137c52ec 100644 --- a/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_wrgg.c +++ b/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_wrgg.c @@ -72,6 +72,16 @@ static int mtdsplit_parse_wrgg(struct mtd_info *master, /* sanity checks */ if (le32_to_cpu(hdr.magic1) == WRGG03_MAGIC) { kernel_ent_size = hdr_len + be32_to_cpu(hdr.size); + /* + * If this becomes silly big it's probably because the + * WRGG image is little-endian. + */ + if (kernel_ent_size > master->size) + kernel_ent_size = hdr_len + le32_to_cpu(hdr.size); + + /* Now what ?! It's neither */ + if (kernel_ent_size > master->size) + return -EINVAL; } else if (le32_to_cpu(hdr.magic1) == WRG_MAGIC) { kernel_ent_size = sizeof(struct wrg_header) + le32_to_cpu( ((struct wrg_header*)&hdr)->size); |