kernel: update bcma and ssb to wireless-testing master-2014-12-05

This brings ssb and bcma to wireless-testing tag master-2014-12-05

In addition it also adds the ARM-BCM5301X-Add-IRQs-to-Broadcom-s-bus-
axi-in-DTS-f.patch which adds the irq number in a way it is done in the
mainline kernel.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

SVN-Revision: 43544

2 files changed, 302 insertions, 39 deletions

diff --git a/target/linux/generic/patches-3.10/020-ssb_update.patch b/target/linux/generic/patches-3.10/020-ssb_update.patch
index 6e93b9a91d..a85ab10967 100644
--- a/target/linux/generic/patches-3.10/020-ssb_update.patch
+++ b/target/linux/generic/patches-3.10/020-ssb_update.patch
@@ -179,7 +179,7 @@
  static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned gpio)
  {
  	struct ssb_bus *bus = ssb_gpio_get_bus(chip);
-@@ -74,19 +98,129 @@ static void ssb_gpio_chipco_free(struct 
+@@ -74,19 +98,129 @@ static void ssb_gpio_chipco_free(struct
  	ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
  }
  
@@ -526,6 +526,16 @@
  int ssb_gpio_init(struct ssb_bus *bus)
  {
  	if (ssb_chipco_available(&bus->chipco))
+@@ -201,7 +475,8 @@ int ssb_gpio_unregister(struct ssb_bus *
+ {
+ 	if (ssb_chipco_available(&bus->chipco) ||
+ 	    ssb_extif_available(&bus->extif)) {
+-		return gpiochip_remove(&bus->gpio);
++		gpiochip_remove(&bus->gpio);
++		return 0;
+ 	} else {
+ 		SSB_WARN_ON(1);
+ 	}
 --- a/drivers/ssb/main.c
 +++ b/drivers/ssb/main.c
 @@ -553,6 +553,14 @@ static int ssb_devices_register(struct s
@@ -726,15 +736,82 @@
  	for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
 --- a/drivers/ssb/pcihost_wrapper.c
 +++ b/drivers/ssb/pcihost_wrapper.c
-@@ -38,7 +38,7 @@ static int ssb_pcihost_resume(struct pci
+@@ -11,15 +11,17 @@
+  * Licensed under the GNU/GPL. See COPYING for details.
+  */
+ 
++#include <linux/pm.h>
+ #include <linux/pci.h>
+ #include <linux/export.h>
+ #include <linux/slab.h>
+ #include <linux/ssb/ssb.h>
+ 
+ 
+-#ifdef CONFIG_PM
+-static int ssb_pcihost_suspend(struct pci_dev *dev, pm_message_t state)
++#ifdef CONFIG_PM_SLEEP
++static int ssb_pcihost_suspend(struct device *d)
+ {
++	struct pci_dev *dev = to_pci_dev(d);
+ 	struct ssb_bus *ssb = pci_get_drvdata(dev);
+ 	int err;
+ 
+@@ -28,17 +30,23 @@ static int ssb_pcihost_suspend(struct pc
+ 		return err;
+ 	pci_save_state(dev);
+ 	pci_disable_device(dev);
+-	pci_set_power_state(dev, pci_choose_state(dev, state));
++
++	/* if there is a wakeup enabled child device on ssb bus,
++	   enable pci wakeup posibility. */
++	device_set_wakeup_enable(d, d->power.wakeup_path);
++
++	pci_prepare_to_sleep(dev);
+ 
+ 	return 0;
+ }
+ 
+-static int ssb_pcihost_resume(struct pci_dev *dev)
++static int ssb_pcihost_resume(struct device *d)
+ {
++	struct pci_dev *dev = to_pci_dev(d);
  	struct ssb_bus *ssb = pci_get_drvdata(dev);
  	int err;
  
 -	pci_set_power_state(dev, 0);
-+	pci_set_power_state(dev, PCI_D0);
++	pci_back_from_sleep(dev);
  	err = pci_enable_device(dev);
  	if (err)
  		return err;
+@@ -49,10 +57,12 @@ static int ssb_pcihost_resume(struct pci
+ 
+ 	return 0;
+ }
+-#else /* CONFIG_PM */
+-# define ssb_pcihost_suspend	NULL
+-# define ssb_pcihost_resume	NULL
+-#endif /* CONFIG_PM */
++
++static const struct dev_pm_ops ssb_pcihost_pm_ops = {
++	SET_SYSTEM_SLEEP_PM_OPS(ssb_pcihost_suspend, ssb_pcihost_resume)
++};
++
++#endif /* CONFIG_PM_SLEEP */
+ 
+ static int ssb_pcihost_probe(struct pci_dev *dev,
+ 			     const struct pci_device_id *id)
+@@ -115,8 +125,9 @@ int ssb_pcihost_register(struct pci_driv
+ {
+ 	driver->probe = ssb_pcihost_probe;
+ 	driver->remove = ssb_pcihost_remove;
+-	driver->suspend = ssb_pcihost_suspend;
+-	driver->resume = ssb_pcihost_resume;
++#ifdef CONFIG_PM_SLEEP
++	driver->driver.pm = &ssb_pcihost_pm_ops;
++#endif
+ 
+ 	return pci_register_driver(driver);
+ }
 --- a/drivers/ssb/sprom.c
 +++ b/drivers/ssb/sprom.c
 @@ -54,7 +54,7 @@ static int hex2sprom(u16 *sprom, const c
diff --git a/target/linux/generic/patches-3.10/025-bcma_backport.patch b/target/linux/generic/patches-3.10/025-bcma_backport.patch
index f752b0b0a1..3ae8fd54a2 100644
--- a/target/linux/generic/patches-3.10/025-bcma_backport.patch
+++ b/target/linux/generic/patches-3.10/025-bcma_backport.patch
@@ -48,16 +48,17 @@
  bcma-$(CONFIG_BCMA_DRIVER_GMAC_CMN)	+= driver_gmac_cmn.o
 --- a/drivers/bcma/bcma_private.h
 +++ b/drivers/bcma/bcma_private.h
-@@ -22,6 +22,8 @@
+@@ -22,6 +22,9 @@
  struct bcma_bus;
  
  /* main.c */
 +bool bcma_wait_value(struct bcma_device *core, u16 reg, u32 mask, u32 value,
 +		     int timeout);
++void bcma_prepare_core(struct bcma_bus *bus, struct bcma_device *core);
  int bcma_bus_register(struct bcma_bus *bus);
  void bcma_bus_unregister(struct bcma_bus *bus);
  int __init bcma_bus_early_register(struct bcma_bus *bus,
-@@ -31,8 +33,6 @@ int __init bcma_bus_early_register(struc
+@@ -31,8 +34,6 @@ int __init bcma_bus_early_register(struc
  int bcma_bus_suspend(struct bcma_bus *bus);
  int bcma_bus_resume(struct bcma_bus *bus);
  #endif
@@ -66,7 +67,7 @@
  
  /* scan.c */
  int bcma_bus_scan(struct bcma_bus *bus);
-@@ -50,6 +50,10 @@ void bcma_chipco_serial_init(struct bcma
+@@ -50,6 +51,10 @@ void bcma_chipco_serial_init(struct bcma
  extern struct platform_device bcma_pflash_dev;
  #endif /* CONFIG_BCMA_DRIVER_MIPS */
  
@@ -77,7 +78,7 @@
  /* driver_chipcommon_pmu.c */
  u32 bcma_pmu_get_alp_clock(struct bcma_drv_cc *cc);
  u32 bcma_pmu_get_cpu_clock(struct bcma_drv_cc *cc);
-@@ -84,6 +88,20 @@ extern int __init bcma_host_pci_init(voi
+@@ -84,6 +89,20 @@ extern int __init bcma_host_pci_init(voi
  extern void __exit bcma_host_pci_exit(void);
  #endif /* CONFIG_BCMA_HOST_PCI */
  
@@ -145,7 +146,7 @@
  }
  EXPORT_SYMBOL_GPL(bcma_core_disable);
  
-@@ -43,6 +64,7 @@ int bcma_core_enable(struct bcma_device 
+@@ -43,6 +64,7 @@ int bcma_core_enable(struct bcma_device
  	bcma_aread32(core, BCMA_IOCTL);
  
  	bcma_awrite32(core, BCMA_RESET_CTL, 0);
@@ -173,6 +174,15 @@
  	}
  
  	if (cc->capabilities & BCMA_CC_CAP_PMU)
+@@ -332,7 +339,7 @@ void bcma_chipco_serial_init(struct bcma
+ 		return;#include "dev-nfc.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"

#define WPJ342_GPIO_LED_STATUS		11
#define WPJ342_GPIO_LED_SIG1		14
#define WPJ342_GPIO_LED_SIG2		13
#define WPJ342_GPIO_LED_SIG3		12
#define WPJ342_GPIO_LED_SIG4		11
#define WPJ342_GPIO_BUZZER			15

#define WPJ342_GPIO_BTN_RESET		17

#define WPJ342_KEYS_POLL_INTERVAL	20 /* msecs */
#define WPJ342_KEYS_DEBOUNCE_INTERVAL	(3 * WPJ342_KEYS_POLL_INTERVAL)

#define WPJ342_MAC0_OFFSET		0x10
#define WPJ342_MAC1_OFFSET		0x18
#define WPJ342_WMAC_CALDATA_OFFSET	0x1000
#define WPJ342_PCIE_CALDATA_OFFSET	0x5000

#define WPJ342_ART_SIZE		0x8000

static struct gpio_led wpj342_leds_gpio[] __initdata = {
	{
		.name		= "wpj342:red:sig1",
		.gpio		= WPJ342_GPIO_LED_SIG1,
		.active_low	= 1,
	},
	{
		.name		= "wpj342:yellow:sig2",
		.gpio		= WPJ342_GPIO_LED_SIG2,
		.active_low	= 1,
	},
	{
		.name		= "wpj342:green:sig3",
		.gpio		= WPJ342_GPIO_LED_SIG3,
		.active_low	= 1,
	},
	{
		.name		= "wpj342:green:sig4",
		.gpio		= WPJ342_GPIO_LED_SIG4,
		.active_low	= 1,
	},
	{
		.name		= "wpj342:buzzer",
		.gpio		= WPJ342_GPIO_BUZZER,
		.active_low	= 0,
	}
};

static struct gpio_keys_button wpj342_gpio_keys[] __initdata = {
	{
		.desc		= "reset",
		.type		= EV_KEY,
		.code		= KEY_RESTART,
		.debounce_interval = WPJ342_KEYS_DEBOUNCE_INTERVAL,
		.gpio		= WPJ342_GPIO_BTN_RESET,
		.active_low	= 1,
	},
};

static struct ar8327_pad_cfg wpj342_ar8327_pad0_cfg = {
	.mode = AR8327_PAD_MAC_RGMII,
	.txclk_delay_en = true,
	.rxclk_delay_en = true,
	.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
	.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
};

static struct ar8327_led_cfg wpj342_ar8327_led_cfg = {
	.led_ctrl0 = 0x00000000,
	.led_ctrl1 = 0xc737c737,
	.led_ctrl2 = 0x00000000,
	.led_ctrl3 = 0x00c30c00,
	.open_drain = true,
};

static struct ar8327_platform_data wpj342_ar8327_data = {
	.pad0_cfg = &wpj342_ar8327_pad0_cfg,
	.port0_cfg = {
		.force_link = 1,
		.speed = AR8327_PORT_SPEED_1000,
		.duplex = 1,
		.txpause = 1,
		.rxpause = 1,
	},
	.led_cfg = &wpj342_ar8327_led_cfg,
};

static struct mdio_board_info wpj342_mdio0_info[] = {
	{
		.bus_id = "ag71xx-mdio.0",
		.phy_addr = 0,
		.platform_data = &wpj342_ar8327_data,
	},
};


static void __init wpj342_setup(void)
{
	u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
	u8 *mac = (u8 *) KSEG1ADDR(0x1f02e000);

	ath79_register_m25p80(NULL);
	ath79_register_leds_gpio(-1, ARRAY_SIZE(wpj342_leds_gpio),
				wpj342_leds_gpio);

	ath79_register_gpio_keys_polled(-1, WPJ342_KEYS_POLL_INTERVAL,
					ARRAY_SIZE(wpj342_gpio_keys),
					wpj342_gpio_keys);

	ath79_register_usb();

	ath79_register_wmac(art + WPJ342_WMAC_CALDATA_OFFSET, NULL);

	ath79_register_pci();

	mdiobus_register_board_info(wpj342_mdio0_info,
				ARRAY_SIZE(wpj342_mdio0_info));

	ath79_register_mdio(1, 0x0);
	ath79_register_mdio(0, 0x0);

	ath79_init_mac(ath79_eth0_data.mac_addr, mac + WPJ342_MAC0_OFFSET, 0);
	ath79_init_mac(ath79_eth1_data.mac_addr, mac + WPJ342_MAC1_OFFSET, 0);

	ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_MII_GMAC0);

	/* GMAC0 is connected to an AR8236 switch */
	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
	ath79_eth0_data.phy_mask = BIT(0);
	ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
	ath79_eth0_pll_data.pll_1000 = 0x06000000;

	ath79_register_eth(0);
}

MIPS_MACHINE(ATH79_MACH_WPJ342, "WPJ342", "Compex WPJ342", wpj342_setup);

++
++static void bcma_register_core(struct bcma_bus *bus, struct bcma_device *core)
++{
++	int err;
 +
 +	err = device_register(&core->dev);
 +	if (err) {
@@ -1161,7 +1262,7 @@
  	}
  
  #ifdef CONFIG_BCMA_DRIVER_MIPS
-@@ -218,7 +293,7 @@ int bcma_bus_register(struct bcma_bus *b
+@@ -218,7 +368,7 @@ int bcma_bus_register(struct bcma_bus *b
  	err = bcma_bus_scan(bus);
  	if (err) {
  		bcma_err(bus, "Failed to scan: %d\n", err);
@@ -1170,7 +1271,7 @@
  	}
  
  	/* Early init CC core */
-@@ -228,6 +303,12 @@ int bcma_bus_register(struct bcma_bus *b
+@@ -228,6 +378,12 @@ int bcma_bus_register(struct bcma_bus *b
  		bcma_core_chipcommon_early_init(&bus->drv_cc);
  	}
  
@@ -1183,7 +1284,7 @@
  	/* Try to get SPROM */
  	err = bcma_sprom_get(bus);
  	if (err == -ENOENT) {
-@@ -242,6 +323,13 @@ int bcma_bus_register(struct bcma_bus *b
+@@ -242,6 +398,13 @@ int bcma_bus_register(struct bcma_bus *b
  		bcma_core_chipcommon_init(&bus->drv_cc);
  	}
  
@@ -1197,7 +1298,7 @@
  	/* Init MIPS core */
  	core = bcma_find_core(bus, BCMA_CORE_MIPS_74K);
  	if (core) {
-@@ -263,6 +351,13 @@ int bcma_bus_register(struct bcma_bus *b
+@@ -263,6 +426,13 @@ int bcma_bus_register(struct bcma_bus *b
  		bcma_core_pci_init(&bus->drv_pci[1]);
  	}
  
@@ -1211,7 +1312,7 @@
  	/* Init GBIT MAC COMMON core */
  	core = bcma_find_core(bus, BCMA_CORE_4706_MAC_GBIT_COMMON);
  	if (core) {
-@@ -271,7 +366,7 @@ int bcma_bus_register(struct bcma_bus *b
+@@ -271,7 +441,7 @@ int bcma_bus_register(struct bcma_bus *b
  	}
  
  	/* Register found cores */
@@ -1220,7 +1321,7 @@
  
  	bcma_info(bus, "Bus registered\n");
  
-@@ -289,6 +384,8 @@ void bcma_bus_unregister(struct bcma_bus
+@@ -289,6 +459,8 @@ void bcma_bus_unregister(struct bcma_bus
  	else if (err)
  		bcma_err(bus, "Can not unregister GPIO driver: %i\n", err);
  
@@ -1229,7 +1330,7 @@
  	cores[0] = bcma_find_core(bus, BCMA_CORE_MIPS_74K);
  	cores[1] = bcma_find_core(bus, BCMA_CORE_PCIE);
  	cores[2] = bcma_find_core(bus, BCMA_CORE_4706_MAC_GBIT_COMMON);
-@@ -308,8 +405,6 @@ int __init bcma_bus_early_register(struc
+@@ -308,8 +480,6 @@ int __init bcma_bus_early_register(struc
  	struct bcma_device *core;
  	struct bcma_device_id match;
  
@@ -1238,7 +1339,7 @@
  	match.manuf = BCMA_MANUF_BCM;
  	match.id = bcma_cc_core_id(bus);
  	match.class = BCMA_CL_SIM;
-@@ -468,6 +563,11 @@ static int __init bcma_modinit(void)
+@@ -468,6 +638,11 @@ static int __init bcma_modinit(void)
  	if (err)
  		return err;
  
@@ -1250,7 +1351,7 @@
  #ifdef CONFIG_BCMA_HOST_PCI
  	err = bcma_host_pci_init();
  	if (err) {
-@@ -485,6 +585,7 @@ static void __exit bcma_modexit(void)
+@@ -485,6 +660,7 @@ static void __exit bcma_modexit(void)
  #ifdef CONFIG_BCMA_HOST_PCI
  	bcma_host_pci_exit();
  #endif
@@ -1260,7 +1361,7 @@
  module_exit(bcma_modexit)
 --- a/drivers/bcma/scan.c
 +++ b/drivers/bcma/scan.c
-@@ -32,6 +32,18 @@ static const struct bcma_device_id_name 
+@@ -32,6 +32,18 @@ static const struct bcma_device_id_name
  	{ BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" },
  	{ BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" },
  	{ BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" },
@@ -1431,6 +1532,14 @@
  	erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM);
  	if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
  		eromptr = ioremap_nocache(erombase, BCMA_CORE_SIZE);
+@@ -489,6 +505,7 @@ int bcma_bus_scan(struct bcma_bus *bus)
+ 		bus->nr_cores++;
+ 		other_core = bcma_find_core_reverse(bus, core->id.id);
+ 		core->core_unit = (other_core == NULL) ? 0 : other_core->core_unit + 1;
++		bcma_prepare_core(bus, core);
+ 
+ 		bcma_info(bus, "Core %d found: %s (manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
+ 			  core->core_index, bcma_device_name(&core->id),
 --- a/drivers/bcma/sprom.c
 +++ b/drivers/bcma/sprom.c
 @@ -72,12 +72,12 @@ fail:
@@ -1760,6 +1869,13 @@
  extern bool bcma_core_is_enabled(struct bcma_device *core);
  extern void bcma_core_disable(struct bcma_device *core, u32 flags);
  extern int bcma_core_enable(struct bcma_device *core, u32 flags);
+@@ -415,4 +447,6 @@ extern u32 bcma_chipco_pll_read(struct b
+ #define  BCMA_DMA_TRANSLATION_DMA64_CMT	0x80000000 /* Client Mode Translation for 64-bit DMA */
+ extern u32 bcma_core_dma_translation(struct bcma_device *core);
+ 
++extern unsigned int bcma_core_irq(struct bcma_device *core, int num);
++
+ #endif /* LINUX_BCMA_H_ */
 --- a/include/linux/bcma/bcma_driver_chipcommon.h
 +++ b/include/linux/bcma/bcma_driver_chipcommon.h
 @@ -330,6 +330,8 @@
@@ -1869,6 +1985,23 @@
 +void bcma_chipco_b_mii_write(struct bcma_drv_cc_b *ccb, u32 offset, u32 value);
 +
  #endif /* LINUX_BCMA_DRIVER_CC_H_ */
+--- a/include/linux/bcma/bcma_driver_mips.h
++++ b/include/linux/bcma/bcma_driver_mips.h
+@@ -43,12 +43,12 @@ struct bcma_drv_mips {
+ extern void bcma_core_mips_init(struct bcma_drv_mips *mcore);
+ extern void bcma_core_mips_early_init(struct bcma_drv_mips *mcore);
+ 
+-extern unsigned int bcma_core_irq(struct bcma_device *core);
++extern unsigned int bcma_core_mips_irq(struct bcma_device *dev);
+ #else
+ static inline void bcma_core_mips_init(struct bcma_drv_mips *mcore) { }
+ static inline void bcma_core_mips_early_init(struct bcma_drv_mips *mcore) { }
+ 
+-static inline unsigned int bcma_core_irq(struct bcma_device *core)
++static inline unsigned int bcma_core_mips_irq(struct bcma_device *dev)
+ {
+ 	return 0;
+ }
 --- a/include/linux/bcma/bcma_driver_pci.h
 +++ b/include/linux/bcma/bcma_driver_pci.h
 @@ -181,10 +181,31 @@ struct pci_dev;
@@ -2169,7 +2302,30 @@
  static const char * const part_probes[] = { "bcm47xxpart", NULL };
  
  static struct physmap_flash_data bcma_pflash_data = {
-@@ -229,11 +237,51 @@ u32 bcma_cpu_clock(struct bcma_drv_mips 
+@@ -107,7 +115,7 @@ static u32 bcma_core_mips_irqflag(struct
+  * If disabled, 5 is returned.
+  * If not supported, 6 is returned.
+  */
+-static unsigned int bcma_core_mips_irq(struct bcma_device *dev)
++unsigned int bcma_core_mips_irq(struct bcma_device *dev)
+ {
+ 	struct bcma_device *mdev = dev->bus->drv_mips.core;
+ 	u32 irqflag;
+@@ -125,13 +133,6 @@ static unsigned int bcma_core_mips_irq(s
+ 	return 5;
+ }
+ 
+-unsigned int bcma_core_irq(struct bcma_device *dev)
+-{
+-	unsigned int mips_irq = bcma_core_mips_irq(dev);
+-	return mips_irq <= 4 ? mips_irq + 2 : 0;
+-}
+-EXPORT_SYMBOL(bcma_core_irq);
+-
+ static void bcma_core_mips_set_irq(struct bcma_device *dev, unsigned int irq)
+ {
+ 	unsigned int oldirq = bcma_core_mips_irq(dev);
+@@ -229,11 +230,51 @@ u32 bcma_cpu_clock(struct bcma_drv_mips
  }
  EXPORT_SYMBOL(bcma_cpu_clock);
  
@@ -2221,7 +2377,7 @@
  
  	switch (cc->capabilities & BCMA_CC_CAP_FLASHT) {
  	case BCMA_CC_FLASHT_STSER:
-@@ -269,6 +317,20 @@ static void bcma_core_mips_flash_detect(
+@@ -269,6 +310,20 @@ static void bcma_core_mips_flash_detect(
  			bcma_nflash_init(cc);
  		}
  	}
@@ -2242,6 +2398,15 @@
  }
  
  void bcma_core_mips_early_init(struct bcma_drv_mips *mcore)
+@@ -361,7 +416,7 @@ void bcma_core_mips_init(struct bcma_drv
+ 		break;
+ 	default:
+ 		list_for_each_entry(core, &bus->cores, list) {
+-			core->irq = bcma_core_irq(core);
++			core->irq = bcma_core_irq(core, 0);
+ 		}
+ 		bcma_err(bus,
+ 			 "Unknown device (0x%x) found, can not configure IRQs\n",
 --- a/drivers/bcma/host_soc.c
 +++ b/drivers/bcma/host_soc.c
 @@ -7,6 +7,9 @@
@@ -2495,7 +2660,7 @@
  	bcm47xx_fill_bcma_boardinfo(&bcm47xx_bus.bcma.bus.boardinfo, NULL);
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/bus/bcma.txt
-@@ -0,0 +1,32 @@
+@@ -0,0 +1,53 @@
 +Driver for ARM AXI Bus with Broadcom Plugins (bcma)
 +
 +Required properties:
@@ -2506,6 +2671,11 @@
 +
 +The cores on the AXI bus are automatically detected by bcma with the
 +memory ranges they are using and they get registered afterwards.
++Automatic detection of the IRQ number is not working on
++BCM47xx/BCM53xx ARM SoCs. To assign IRQ numbers to the cores, provide
++them manually through device tree. Use an interrupt-map to specify the
++IRQ used by the devices on the bus. The first address is just an index,
++because we do not have any special register.
 +
 +The top-level axi bus may contain children representing attached cores
 +(devices). This is needed since some hardware details can't be auto
@@ -2520,6 +2690,22 @@
 +		ranges = <0x00000000 0x18000000 0x00100000>;
 +		#address-cells = <1>;
 +		#size-cells = <1>;
++		#interrupt-cells = <1>;
++		interrupt-map-mask = <0x000fffff 0xffff>;
++		interrupt-map =
++			/* Ethernet Controller 0 */
++			<0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
++
++			/* Ethernet Controller 1 */
++			<0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
++
++			/* PCIe Controller 0 */
++			<0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
++			<0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
++			<0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
++			<0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
++			<0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
++			<0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
 +
 +		chipcommon {
 +			reg = <0x00000000 0x1000>;