diff options
author | Felix Fietkau <nbd@openwrt.org> | 2014-07-29 10:25:43 +0000 |
---|---|---|
committer | Felix Fietkau <nbd@openwrt.org> | 2014-07-29 10:25:43 +0000 |
commit | 4cf06a885e8fa62a08f50d5a032a102652fb5cf4 (patch) | |
tree | 163fee3d336d9e5112e1df265fd1560e93c2f1d5 /target/linux/imx6 | |
parent | 155510ec8e938f5bea4a35a5e11d93b81ed6bd20 (diff) | |
download | upstream-4cf06a885e8fa62a08f50d5a032a102652fb5cf4.tar.gz upstream-4cf06a885e8fa62a08f50d5a032a102652fb5cf4.tar.bz2 upstream-4cf06a885e8fa62a08f50d5a032a102652fb5cf4.zip |
BB: remove all kernel versions except for 3.10
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/branches/barrier_breaker@41877 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/imx6')
9 files changed, 0 insertions, 3630 deletions
diff --git a/target/linux/imx6/config-3.14 b/target/linux/imx6/config-3.14 deleted file mode 100644 index 55fcf3b5a3..0000000000 --- a/target/linux/imx6/config-3.14 +++ /dev/null @@ -1,367 +0,0 @@ -CONFIG_AHCI_IMX=y -CONFIG_ALIGNMENT_TRAP=y -CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y -CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_ARCH_HAS_OPP=y -CONFIG_ARCH_HAS_RESET_CONTROLLER=y -CONFIG_ARCH_HAS_TICK_BROADCAST=y -CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MULTIPLATFORM=y -# CONFIG_ARCH_MULTI_CPU_AUTO is not set -CONFIG_ARCH_MULTI_V6_V7=y -CONFIG_ARCH_MULTI_V7=y -CONFIG_ARCH_MXC=y -# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set -CONFIG_ARCH_NR_GPIO=0 -CONFIG_ARCH_REQUIRE_GPIOLIB=y -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_WANT_GENERAL_HUGETLB=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ARM=y -# CONFIG_ARM_CPU_SUSPEND is not set -CONFIG_ARM_ERRATA_754322=y -CONFIG_ARM_ERRATA_764369=y -CONFIG_ARM_ERRATA_775420=y -CONFIG_ARM_GIC=y -CONFIG_ARM_IMX6Q_CPUFREQ=y -# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_L1_CACHE_SHIFT_6=y -# CONFIG_ARM_LPAE is not set -CONFIG_ARM_NR_BANKS=8 -CONFIG_ARM_PATCH_PHYS_VIRT=y -CONFIG_ARM_THUMB=y -# CONFIG_ARM_THUMBEE is not set -CONFIG_ARM_VIRT_EXT=y -CONFIG_ATA=y -CONFIG_ATAGS=y -# CONFIG_ATA_SFF is not set -CONFIG_AUTO_ZRELADDR=y -# CONFIG_CACHE_L2X0 is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLKSRC_OF=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_COMMON_CLK=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_FREQ=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_STAT_DETAILS=y -CONFIG_CPU_HAS_ASID=y -# CONFIG_CPU_ICACHE_DISABLE is not set -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_V7=y -CONFIG_CRC16=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_XZ=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_IMX_UART_PORT=1 -CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" -# CONFIG_DEBUG_UART_8250 is not set -# CONFIG_DEBUG_UART_PL01X is not set -# CONFIG_DEBUG_USER is not set -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_LZO=y -CONFIG_DECOMPRESS_XZ=y -CONFIG_DMADEVICES=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_OF=y -CONFIG_DTC=y -# CONFIG_DW_DMAC_CORE is not set -# CONFIG_DW_DMAC_PCI is not set -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_POSIX_ACL=y -CONFIG_EXT2_FS_SECURITY=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_POSIX_ACL=y -CONFIG_EXT3_FS_SECURITY=y -CONFIG_EXT3_FS_XATTR=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y -CONFIG_FEC=y -CONFIG_FRAME_POINTER=y -CONFIG_FS_MBCACHE=y -CONFIG_FS_POSIX_ACL=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -# CONFIG_GENERIC_CPUFREQ_CPU0 is not set -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IO=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_NET_UTILS=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GPIOLIB=y -CONFIG_GPIO_DEVRES=y -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_MXC=y -CONFIG_GPIO_SYSFS=y -# CONFIG_HAMRADIO is not set -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ARM_SCU=y -CONFIG_HAVE_ARM_TWD=y -# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set -CONFIG_HAVE_BPF_JIT=y -CONFIG_HAVE_CC_STACKPROTECTOR=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DMA_API_DEBUG=y -CONFIG_HAVE_DMA_ATTRS=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_HW_BREAKPOINT=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IMX_ANATOP=y -CONFIG_HAVE_IMX_GPC=y -CONFIG_HAVE_IMX_MMDC=y -CONFIG_HAVE_IMX_SRC=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_KERNEL_GZIP=y -CONFIG_HAVE_KERNEL_LZ4=y -CONFIG_HAVE_KERNEL_LZMA=y -CONFIG_HAVE_KERNEL_LZO=y -CONFIG_HAVE_KERNEL_XZ=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_PROC_CPU=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_SMP=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_UID16=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HZ_FIXED=0 -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_IMX=y -CONFIG_IMX2_WDT=y -CONFIG_IMX_DMA=y -CONFIG_IMX_SDMA=y -# CONFIG_IMX_WEIM is not set -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IOMMU_HELPER=y -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_JBD=y -CONFIG_JBD2=y -CONFIG_KTIME_SCALAR=y -# CONFIG_LEDS_REGULATOR is not set -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -# CONFIG_MACH_EUKREA_CPUIMX51SD is not set -# CONFIG_MACH_IMX51_DT is not set -# CONFIG_MACH_MX51_BABBAGE is not set -CONFIG_MDIO_BOARDINFO=y -CONFIG_MFD_SYSCON=y -CONFIG_MIGHT_HAVE_CACHE_L2X0=y -CONFIG_MIGHT_HAVE_PCI=y -# CONFIG_MLX5_CORE is not set -CONFIG_MMC=y -CONFIG_MMC_BLOCK=y -# CONFIG_MMC_MXC is not set -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_ESDHC_IMX=y -CONFIG_MMC_SDHCI_IO_ACCESSORS=y -# CONFIG_MMC_SDHCI_PCI is not set -CONFIG_MMC_SDHCI_PLTFM=y -# CONFIG_MMC_TIFM_SD is not set -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MTD_M25P80=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_NAND_GPMI_NAND=y -# CONFIG_MTD_PHYSMAP_OF is not set -# CONFIG_MTD_SM_COMMON is not set -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_BEB_LIMIT=20 -# CONFIG_MTD_UBI_BLOCK is not set -# CONFIG_MTD_UBI_FASTMAP is not set -# CONFIG_MTD_UBI_GLUEBI is not set -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MULTI_IRQ_HANDLER=y -CONFIG_MUTEX_SPIN_ON_OWNER=y -# CONFIG_MX3_IPU is not set -# CONFIG_MXC_DEBUG_BOARD is not set -CONFIG_MXS_DMA=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEON=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_RX_BUSY_POLL=y -CONFIG_NLS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NO_BOOTMEM=y -CONFIG_NO_HZ_COMMON=y -CONFIG_NO_HZ_IDLE=y -CONFIG_NR_CPUS=4 -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_MDIO=y -CONFIG_OF_MTD=y -CONFIG_OF_NET=y -CONFIG_OF_PCI=y -CONFIG_OF_PCI_IRQ=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_PAGE_OFFSET=0x80000000 -CONFIG_PCI=y -CONFIG_PCIEAER=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_DW=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_IMX6=y -CONFIG_PERF_EVENTS=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PHYLIB=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_IMX=y -CONFIG_PINCTRL_IMX6Q=y -CONFIG_PINCTRL_IMX6SL=y -# CONFIG_PINCTRL_SINGLE is not set -CONFIG_PM_OPP=y -CONFIG_PPS=y -# CONFIG_PREEMPT_RCU is not set -CONFIG_PROC_DEVICETREE=y -CONFIG_PTP_1588_CLOCK=y -CONFIG_RATIONAL=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_RD_BZIP2=y -CONFIG_RD_GZIP=y -CONFIG_RD_LZO=y -CONFIG_RD_XZ=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGMAP_SPI=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_ANATOP=y -# CONFIG_REGULATOR_DEBUG is not set -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_PFUZE100=y -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_RFKILL_REGULATOR is not set -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -CONFIG_RTC_CLASS=y -# CONFIG_RTC_DRV_IMXDI is not set -# CONFIG_RTC_DRV_MXC is not set -CONFIG_SATA_AHCI_PLATFORM=y -CONFIG_SCHED_HRTICK=y -CONFIG_SCSI=y -CONFIG_SERIAL_IMX=y -CONFIG_SERIAL_IMX_CONSOLE=y -CONFIG_SMP=y -CONFIG_SMP_ON_UP=y -CONFIG_SOC_BUS=y -# CONFIG_SOC_IMX50 is not set -# CONFIG_SOC_IMX53 is not set -CONFIG_SOC_IMX6Q=y -CONFIG_SOC_IMX6SL=y -# CONFIG_SOC_VF610 is not set -CONFIG_SPARSE_IRQ=y -CONFIG_SPI=y -CONFIG_SPI_BITBANG=y -CONFIG_SPI_IMX=y -CONFIG_SPI_MASTER=y -CONFIG_STMP_DEVICE=y -CONFIG_STOP_MACHINE=y -CONFIG_SWIOTLB=y -# CONFIG_SWP_EMULATE is not set -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -# CONFIG_THUMB2_KERNEL is not set -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TREE_RCU=y -CONFIG_UBIFS_FS=y -CONFIG_UBIFS_FS_ADVANCED_COMPR=y -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_XZ=y -CONFIG_UBIFS_FS_ZLIB=y -CONFIG_UID16=y -CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" -# CONFIG_USB_MXS_PHY is not set -CONFIG_USB_SUPPORT=y -CONFIG_USE_OF=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_VMSPLIT_2G=y -# CONFIG_VMSPLIT_3G is not set -# CONFIG_XEN is not set -CONFIG_XPS=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_ZBOOT_ROM_TEXT=0x0 -# CONFIG_ZBUD is not set -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZONE_DMA_FLAG=0 diff --git a/target/linux/imx6/patches-3.14/0001-ARM-dts-disable-flexcan-by-default.patch b/target/linux/imx6/patches-3.14/0001-ARM-dts-disable-flexcan-by-default.patch deleted file mode 100644 index babd544af8..0000000000 --- a/target/linux/imx6/patches-3.14/0001-ARM-dts-disable-flexcan-by-default.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 1759b172f78263de7077a2743e11f3b718682849 Mon Sep 17 00:00:00 2001 -From: Tim Harvey <tharvey@gateworks.com> -Date: Tue, 22 Oct 2013 21:51:27 -0700 -Subject: [PATCH 1/3] ARM: dts: disable flexcan by default - -Typically nodes are disabled by default and enabled when needed. - -Signed-off-by: Tim Harvey <tharvey@gateworks.com> -Signed-off-by: Shawn Guo <shawn.guo@linaro.org> ---- - arch/arm/boot/dts/imx6qdl.dtsi | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/arch/arm/boot/dts/imx6qdl.dtsi -+++ b/arch/arm/boot/dts/imx6qdl.dtsi -@@ -331,6 +331,7 @@ - interrupts = <0 110 0x04>; - clocks = <&clks 108>, <&clks 109>; - clock-names = "ipg", "per"; -+ status = "disabled"; - }; - - can2: flexcan@02094000 { -@@ -339,6 +340,7 @@ - interrupts = <0 111 0x04>; - clocks = <&clks 110>, <&clks 111>; - clock-names = "ipg", "per"; -+ status = "disabled"; - }; - - gpt: gpt@02098000 { diff --git a/target/linux/imx6/patches-3.14/0002-ARM-dts-added-several-new-imx-pinmux-groups.patch b/target/linux/imx6/patches-3.14/0002-ARM-dts-added-several-new-imx-pinmux-groups.patch deleted file mode 100644 index f2d7f6ca17..0000000000 --- a/target/linux/imx6/patches-3.14/0002-ARM-dts-added-several-new-imx-pinmux-groups.patch +++ /dev/null @@ -1,115 +0,0 @@ -From 925467009cc6d92edb02b9e68710db022cd56f41 Mon Sep 17 00:00:00 2001 -From: Tim Harvey <tharvey@gateworks.com> -Date: Tue, 22 Oct 2013 21:51:25 -0700 -Subject: [PATCH 2/3] ARM: dts: added several new imx-pinmux groups - -Signed-off-by: Tim Harvey <tharvey@gateworks.com> -Signed-off-by: Shawn Guo <shawn.guo@linaro.org> ---- - arch/arm/boot/dts/imx6qdl.dtsi | 60 ++++++++++++++++++++++++++++++++++++++++++ - 1 file changed, 60 insertions(+) - ---- a/arch/arm/boot/dts/imx6qdl.dtsi -+++ b/arch/arm/boot/dts/imx6qdl.dtsi -@@ -639,6 +639,14 @@ - MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x80000000 - >; - }; -+ -+ pinctrl_audmux_4: audmux-4 { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D24__AUD5_RXFS 0x80000000 -+ MX6QDL_PAD_EIM_D25__AUD5_RXC 0x80000000 -+ MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x80000000 -+ >; -+ }; - }; - - ecspi1 { -@@ -811,6 +819,28 @@ - MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 - >; - }; -+ -+ /* No Strobe */ -+ pinctrl_gpmi_nand_2: gpmi-nand-2 { -+ fsl,pins = < -+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -+ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 -+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -+ >; -+ }; - }; - - hdmi_hdcp { -@@ -1058,6 +1088,13 @@ - MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 - >; - }; -+ -+ pinctrl_uart1_2: uart1grp-2 { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 -+ >; -+ }; - }; - - uart2 { -@@ -1076,6 +1113,13 @@ - MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1 - >; - }; -+ -+ pinctrl_uart2_3: uart2grp-3 { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 -+ >; -+ }; - }; - - uart3 { -@@ -1096,6 +1140,13 @@ - MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1 - >; - }; -+ -+ pinctrl_uart3_3: uart3grp-3 { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 -+ >; -+ }; - }; - - uart4 { -@@ -1106,6 +1157,15 @@ - >; - }; - }; -+ -+ uart5 { -+ pinctrl_uart5_1: uart5grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 -+ >; -+ }; -+ }; - - usbotg { - pinctrl_usbotg_1: usbotggrp-1 { diff --git a/target/linux/imx6/patches-3.14/0003-ARM-dts-add-Gateworks-Ventana-support.patch b/target/linux/imx6/patches-3.14/0003-ARM-dts-add-Gateworks-Ventana-support.patch deleted file mode 100644 index cfc2898d2e..0000000000 --- a/target/linux/imx6/patches-3.14/0003-ARM-dts-add-Gateworks-Ventana-support.patch +++ /dev/null @@ -1,2886 +0,0 @@ -From e3946fe8050534ccaf8c1266cb1fa90c7f3345c3 Mon Sep 17 00:00:00 2001 -From: Tim Harvey <tharvey@gateworks.com> -Date: Fri, 7 Feb 2014 15:24:56 +0800 -Subject: [PATCH] ARM: dts: add Gateworks Ventana support - -The Gateworks Ventana product family consists of several baseboard designs -based on the Freescale i.MX6 family of processors. Each baseboard has a -different set of possible features. - -Signed-off-by: Tim Harvey <tharvey@gateworks.com> -Signed-off-by: Shawn Guo <shawn.guo@linaro.org> ---- - arch/arm/boot/dts/Makefile | 9 + - arch/arm/boot/dts/imx6dl-gw51xx.dts | 19 ++ - arch/arm/boot/dts/imx6dl-gw52xx.dts | 19 ++ - arch/arm/boot/dts/imx6dl-gw53xx.dts | 19 ++ - arch/arm/boot/dts/imx6dl-gw54xx.dts | 19 ++ - arch/arm/boot/dts/imx6q-gw51xx.dts | 19 ++ - arch/arm/boot/dts/imx6q-gw52xx.dts | 23 ++ - arch/arm/boot/dts/imx6q-gw53xx.dts | 23 ++ - arch/arm/boot/dts/imx6q-gw5400-a.dts | 546 ++++++++++++++++++++++++++++++++ - arch/arm/boot/dts/imx6q-gw54xx.dts | 23 ++ - arch/arm/boot/dts/imx6qdl-gw51xx.dtsi | 374 ++++++++++++++++++++++ - arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 490 ++++++++++++++++++++++++++++ - arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 553 ++++++++++++++++++++++++++++++++ - arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 580 ++++++++++++++++++++++++++++++++++ - 14 files changed, 2716 insertions(+) - create mode 100644 arch/arm/boot/dts/imx6dl-gw51xx.dts - create mode 100644 arch/arm/boot/dts/imx6dl-gw52xx.dts - create mode 100644 arch/arm/boot/dts/imx6dl-gw53xx.dts - create mode 100644 arch/arm/boot/dts/imx6dl-gw54xx.dts - create mode 100644 arch/arm/boot/dts/imx6q-gw51xx.dts - create mode 100644 arch/arm/boot/dts/imx6q-gw52xx.dts - create mode 100644 arch/arm/boot/dts/imx6q-gw53xx.dts - create mode 100644 arch/arm/boot/dts/imx6q-gw5400-a.dts - create mode 100644 arch/arm/boot/dts/imx6q-gw54xx.dts - create mode 100644 arch/arm/boot/dts/imx6qdl-gw51xx.dtsi - create mode 100644 arch/arm/boot/dts/imx6qdl-gw52xx.dtsi - create mode 100644 arch/arm/boot/dts/imx6qdl-gw53xx.dtsi - create mode 100644 arch/arm/boot/dts/imx6qdl-gw54xx.dtsi - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -154,12 +154,21 @@ dtb-$(CONFIG_ARCH_MXC) += \ - imx53-qsb.dtb \ - imx53-smd.dtb \ - imx6dl-cubox-i.dtb \ -+ imx6dl-gw51xx.dtb \ -+ imx6dl-gw52xx.dtb \ -+ imx6dl-gw53xx.dtb \ -+ imx6dl-gw54xx.dtb \ - imx6dl-hummingboard.dtb \ - imx6dl-sabreauto.dtb \ - imx6dl-sabresd.dtb \ - imx6dl-wandboard.dtb \ - imx6q-arm2.dtb \ - imx6q-cubox-i.dtb \ -+ imx6q-gw51xx.dtb \ -+ imx6q-gw52xx.dtb \ -+ imx6q-gw53xx.dtb \ -+ imx6q-gw5400-a.dtb \ -+ imx6q-gw54xx.dtb \ - imx6q-phytec-pbab01.dtb \ - imx6q-sabreauto.dtb \ - imx6q-sabrelite.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/imx6dl-gw51xx.dts -@@ -0,0 +1,19 @@ -+/* -+ * Copyright 2013 Gateworks Corporation -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+/dts-v1/; -+#include "imx6dl.dtsi" -+#include "imx6qdl-gw51xx.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW51XX"; -+ compatible = "gw,imx6dl-gw51xx", "gw,ventana", "fsl,imx6dl"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6dl-gw52xx.dts -@@ -0,0 +1,19 @@ -+/* -+ * Copyright 2013 Gateworks Corporation -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+/dts-v1/; -+#include "imx6dl.dtsi" -+#include "imx6qdl-gw52xx.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW52XX"; -+ compatible = "gw,imx6dl-gw52xx", "gw,ventana", "fsl,imx6dl"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6dl-gw53xx.dts -@@ -0,0 +1,19 @@ -+/* -+ * Copyright 2013 Gateworks Corporation -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+/dts-v1/; -+#include "imx6dl.dtsi" -+#include "imx6qdl-gw53xx.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW53XX"; -+ compatible = "gw,imx6dl-gw53xx", "gw,ventana", "fsl,imx6dl"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6dl-gw54xx.dts -@@ -0,0 +1,19 @@ -+/* -+ * Copyright 2013 Gateworks Corporation -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+/dts-v1/; -+#include "imx6dl.dtsi" -+#include "imx6qdl-gw54xx.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW54XX"; -+ compatible = "gw,imx6dl-gw54xx", "gw,ventana", "fsl,imx6dl"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-gw51xx.dts -@@ -0,0 +1,19 @@ -+/* -+ * Copyright 2013 Gateworks Corporation -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+/dts-v1/; -+#include "imx6q.dtsi" -+#include "imx6qdl-gw51xx.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 Dual/Quad GW51XX"; -+ compatible = "gw,imx6q-gw51xx", "gw,ventana", "fsl,imx6q"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-gw52xx.dts -@@ -0,0 +1,23 @@ -+/* -+ * Copyright 2013 Gateworks Corporation -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+/dts-v1/; -+#include "imx6q.dtsi" -+#include "imx6qdl-gw52xx.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 Dual/Quad GW52XX"; -+ compatible = "gw,imx6q-gw52xx", "gw,ventana", "fsl,imx6q"; -+}; -+ -+&sata { -+ status = "okay"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-gw53xx.dts -@@ -0,0 +1,23 @@ -+/* -+ * Copyright 2013 Gateworks Corporation -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+/dts-v1/; -+#include "imx6q.dtsi" -+#include "imx6qdl-gw53xx.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 Dual/Quad GW53XX"; -+ compatible = "gw,imx6q-gw53xx", "gw,ventana", "fsl,imx6q"; -+}; -+ -+&sata { -+ status = "okay"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-gw5400-a.dts -@@ -0,0 +1,543 @@ -+/* -+ * Copyright 2013 Gateworks Corporation -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+/dts-v1/; -+#include "imx6q.dtsi" -+ -+/ { -+ model = "Gateworks Ventana GW5400-A"; -+ compatible = "gw,imx6q-gw5400-a", "gw,ventana", "fsl,imx6q"; -+ -+ /* these are used by bootloader for disabling nodes */ -+ aliases { -+ ethernet0 = &fec; -+ ethernet1 = ð1; -+ i2c0 = &i2c1; -+ i2c1 = &i2c2; -+ i2c2 = &i2c3; -+ led0 = &led0; -+ led1 = &led1; -+ led2 = &led2; -+ sky2 = ð1; -+ ssi0 = &ssi1; -+ spi0 = &ecspi1; -+ usb0 = &usbh1; -+ usb1 = &usbotg; -+ usdhc2 = &usdhc3; -+ }; -+ -+ chosen { -+ bootargs = "console=ttymxc1,115200"; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ led0: user1 { -+ label = "user1"; -+ gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */ -+ default-state = "on"; -+ linux,default-trigger = "heartbeat"; -+ }; -+ -+ led1: user2 { -+ label = "user2"; -+ gpios = <&gpio4 10 0>; /* 106 -> MX6_PANLEDR */ -+ default-state = "off"; -+ }; -+ -+ led2: user3 { -+ label = "user3"; -+ gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */ -+ default-state = "off"; -+ }; -+ }; -+ -+ memory { -+ reg = <0x10000000 0x40000000>; -+ }; -+ -+ pps { -+ compatible = "pps-gpio"; -+ gpios = <&gpio1 5 0>; -+ status = "okay"; -+ }; -+ -+ regulators { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ reg_1p0v: regulator@0 { -+ compatible = "regulator-fixed"; -+ reg = <0>; -+ regulator-name = "1P0V"; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1000000>; -+ regulator-always-on; -+ }; -+ -+ reg_3p3v: regulator@1 { -+ compatible = "regulator-fixed"; -+ reg = <1>; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ reg_usb_h1_vbus: regulator@2 { -+ compatible = "regulator-fixed"; -+ reg = <2>; -+ regulator-name = "usb_h1_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+ -+ reg_usb_otg_vbus: regulator@3 { -+ compatible = "regulator-fixed"; -+ reg = <3>; -+ regulator-name = "usb_otg_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&gpio3 22 0>; -+ enable-active-high; -+ }; -+ }; -+ -+ sound { -+ compatible = "fsl,imx6q-ventana-sgtl5000", -+ "fsl,imx-audio-sgtl5000"; -+ model = "sgtl5000-audio"; -+ ssi-controller = <&ssi1>; -+ audio-codec = <&codec>; -+ audio-routing = -+ "MIC_IN", "Mic Jack", -+ "Mic Jack", "Mic Bias", -+ "Headphone Jack", "HP_OUT"; -+ mux-int-port = <1>; -+ mux-ext-port = <4>; -+ }; -+}; -+ -+&audmux { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_audmux>; -+ status = "okay"; -+}; -+ -+&ecspi1 { -+ fsl,spi-num-chipselects = <1>; -+ cs-gpios = <&gpio3 19 0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_ecspi1>; -+ status = "okay"; -+ -+ flash: m25p80@0 { -+ compatible = "sst,w25q256"; -+ spi-max-frequency = <30000000>; -+ reg = <0>; -+ }; -+}; -+ -+&fec { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_enet>; -+ phy-mode = "rgmii"; -+ phy-reset-gpios = <&gpio1 30 0>; -+ status = "okay"; -+}; -+ -+&i2c1 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1>; -+ status = "okay"; -+ -+ eeprom1: eeprom@50 { -+ compatible = "atmel,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ eeprom2: eeprom@51 { -+ compatible = "atmel,24c02"; -+ reg = <0x51>; -+ pagesize = <16>; -+ }; -+ -+ eeprom3: eeprom@52 { -+ compatible = "atmel,24c02"; -+ reg = <0x52>; -+ pagesize = <16>; -+ }; -+ -+ eeprom4: eeprom@53 { -+ compatible = "atmel,24c02"; -+ reg = <0x53>; -+ pagesize = <16>; -+ }; -+ -+ gpio: pca9555@23 { -+ compatible = "nxp,pca9555"; -+ reg = <0x23>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; -+ -+ hwmon: gsc@29 { -+ compatible = "gw,gsp"; -+ reg = <0x29>; -+ }; -+ -+ rtc: ds1672@68 { -+ compatible = "dallas,ds1672"; -+ reg = <0x68>; -+ }; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c2>; -+ status = "okay"; -+ -+ pmic: pfuze100@08 { -+ compatible = "fsl,pfuze100"; -+ reg = <0x08>; -+ -+ regulators { -+ sw1a_reg: sw1ab { -+ regulator-min-microvolt = <300000>; -+ regulator-max-microvolt = <1875000>; -+ regulator-boot-on; -+ regulator-always-on; -+ regulator-ramp-delay = <6250>; -+ }; -+ -+ sw1c_reg: sw1c { -+ regulator-min-microvolt = <300000>; -+ regulator-max-microvolt = <1875000>; -+ regulator-boot-on; -+ regulator-always-on; -+ regulator-ramp-delay = <6250>; -+ }; -+ -+ sw2_reg: sw2 { -+ regulator-min-microvolt = <800000>; -+ regulator-max-microvolt = <3950000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ sw3a_reg: sw3a { -+ regulator-min-microvolt = <400000>; -+ regulator-max-microvolt = <1975000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ sw3b_reg: sw3b { -+ regulator-min-microvolt = <400000>; -+ regulator-max-microvolt = <1975000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ sw4_reg: sw4 { -+ regulator-min-microvolt = <800000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ -+ swbst_reg: swbst { -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5150000>; -+ }; -+ -+ snvs_reg: vsnvs { -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <3000000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ vref_reg: vrefddr { -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ vgen1_reg: vgen1 { -+ regulator-min-microvolt = <800000>; -+ regulator-max-microvolt = <1550000>; -+ }; -+ -+ vgen2_reg: vgen2 { -+ regulator-min-microvolt = <800000>; -+ regulator-max-microvolt = <1550000>; -+ }; -+ -+ vgen3_reg: vgen3 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ -+ vgen4_reg: vgen4 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ vgen5_reg: vgen5 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ vgen6_reg: vgen6 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ }; -+ }; -+ -+ pciswitch: pex8609@3f { -+ compatible = "plx,pex8609"; -+ reg = <0x3f>; -+ }; -+ -+ pciclkgen: si52147@6b { -+ compatible = "sil,si52147"; -+ reg = <0x6b>; -+ }; -+}; -+ -+&i2c3 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ status = "okay"; -+ -+ accelerometer: mma8450@1c { -+ compatible = "fsl,mma8450"; -+ reg = <0x1c>; -+ }; -+ -+ codec: sgtl5000@0a { -+ compatible = "fsl,sgtl5000"; -+ reg = <0x0a>; -+ clocks = <&clks 201>; -+ VDDA-supply = <&sw4_reg>; -+ VDDIO-supply = <®_3p3v>; -+ }; -+ -+ hdmiin: adv7611@4c { -+ compatible = "adi,adv7611"; -+ reg = <0x4c>; -+ }; -+ -+ touchscreen: egalax_ts@04 { -+ compatible = "eeti,egalax_ts"; -+ reg = <0x04>; -+ interrupt-parent = <&gpio7>; -+ interrupts = <12 2>; /* gpio7_12 active low */ -+ wakeup-gpios = <&gpio7 12 0>; -+ }; -+ -+ videoout: adv7393@2a { -+ compatible = "adi,adv7393"; -+ reg = <0x2a>; -+ }; -+ -+ videoin: adv7180@20 { -+ compatible = "adi,adv7180"; -+ reg = <0x20>; -+ }; -+}; -+ -+&iomuxc { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hog>; -+ -+ imx6q-gw5400-a { -+ pinctrl_hog: hoggrp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */ -+ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 /* SPINOR_CS0# */ -+ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */ -+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */ -+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */ -+ MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000 /* GPS_PPS */ -+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */ -+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */ -+ MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x80000000 /* user2 led */ -+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */ -+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 /* USBHUB_RST# */ -+ MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 /* MIPI_DIO */ -+ >; -+ }; -+ -+ pinctrl_audmux: audmuxgrp { -+ fsl,pins = < -+ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0 -+ MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0 -+ MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0 -+ MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0 -+ >; -+ }; -+ -+ pinctrl_ecspi1: ecspi1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 -+ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 -+ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 -+ >; -+ }; -+ -+ pinctrl_enet: enetgrp { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 -+ >; -+ }; -+ -+ pinctrl_i2c1: i2c1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_uart1: uart1grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart2: uart2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart5: uart5grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 -+ >; -+ }; -+ -+ pinctrl_usdhc3: usdhc3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 -+ >; -+ }; -+ }; -+}; -+ -+&ldb { -+ status = "okay"; -+}; -+ -+&pcie { -+ reset-gpio = <&gpio1 29 0>; -+ status = "okay"; -+ -+ eth1: sky2@8 { /* MAC/PHY on bus 8 */ -+ compatible = "marvell,sky2"; -+ }; -+}; -+ -+&ssi1 { -+ fsl,mode = "i2s-slave"; -+ status = "okay"; -+}; -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart1>; -+ status = "okay"; -+}; -+ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart2>; -+ status = "okay"; -+}; -+ -+&uart5 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart5>; -+ status = "okay"; -+}; -+ -+&usbotg { -+ vbus-supply = <®_usb_otg_vbus>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ disable-over-current; -+ status = "okay"; -+}; -+ -+&usbh1 { -+ vbus-supply = <®_usb_h1_vbus>; -+ status = "okay"; -+}; -+ -+&usdhc3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usdhc3>; -+ cd-gpios = <&gpio7 0 0>; -+ vmmc-supply = <®_3p3v>; -+ status = "okay"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-gw54xx.dts -@@ -0,0 +1,23 @@ -+/* -+ * Copyright 2013 Gateworks Corporation -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+/dts-v1/; -+#include "imx6q.dtsi" -+#include "imx6qdl-gw54xx.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 Dual/Quad GW54XX"; -+ compatible = "gw,imx6q-gw54xx", "gw,ventana", "fsl,imx6q"; -+}; -+ -+&sata { -+ status = "okay"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi -@@ -0,0 +1,374 @@ -+/* -+ * Copyright 2013 Gateworks Corporation -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+/ { -+ /* these are used by bootloader for disabling nodes */ -+ aliases { -+ can0 = &can1; -+ ethernet0 = &fec; -+ led0 = &led0; -+ led1 = &led1; -+ nand = &gpmi; -+ usb0 = &usbh1; -+ usb1 = &usbotg; -+ }; -+ -+ chosen { -+ bootargs = "console=ttymxc1,115200"; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ led0: user1 { -+ label = "user1"; -+ gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */ -+ default-state = "on"; -+ linux,default-trigger = "heartbeat"; -+ }; -+ -+ led1: user2 { -+ label = "user2"; -+ gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */ -+ default-state = "off"; -+ }; -+ }; -+ -+ memory { -+ reg = <0x10000000 0x20000000>; -+ }; -+ -+ pps { -+ compatible = "pps-gpio"; -+ gpios = <&gpio1 26 0>; -+ status = "okay"; -+ }; -+ -+ regulators { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ reg_3p3v: regulator@0 { -+ compatible = "regulator-fixed"; -+ reg = <0>; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ reg_5p0v: regulator@1 { -+ compatible = "regulator-fixed"; -+ reg = <1>; -+ regulator-name = "5P0V"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+ -+ reg_usb_otg_vbus: regulator@2 { -+ compatible = "regulator-fixed"; -+ reg = <2>; -+ regulator-name = "usb_otg_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&gpio3 22 0>; -+ enable-active-high; -+ }; -+ }; -+}; -+ -+&fec { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_enet>; -+ phy-mode = "rgmii"; -+ phy-reset-gpios = <&gpio1 30 0>; -+ status = "okay"; -+}; -+ -+&gpmi { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpmi_nand>; -+ status = "okay"; -+}; -+ -+&i2c1 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1>; -+ status = "okay"; -+ -+ eeprom1: eeprom@50 { -+ compatible = "atmel,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ eeprom2: eeprom@51 { -+ compatible = "atmel,24c02"; -+ reg = <0x51>; -+ pagesize = <16>; -+ }; -+ -+ eeprom3: eeprom@52 { -+ compatible = "atmel,24c02"; -+ reg = <0x52>; -+ pagesize = <16>; -+ }; -+ -+ eeprom4: eeprom@53 { -+ compatible = "atmel,24c02"; -+ reg = <0x53>; -+ pagesize = <16>; -+ }; -+ -+ gpio: pca9555@23 { -+ compatible = "nxp,pca9555"; -+ reg = <0x23>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; -+ -+ hwmon: gsc@29 { -+ compatible = "gw,gsp"; -+ reg = <0x29>; -+ }; -+ -+ rtc: ds1672@68 { -+ compatible = "dallas,ds1672"; -+ reg = <0x68>; -+ }; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c2>; -+ status = "okay"; -+ -+ pmic: ltc3676@3c { -+ compatible = "ltc,ltc3676"; -+ reg = <0x3c>; -+ -+ regulators { -+ sw1_reg: ltc3676__sw1 { -+ regulator-min-microvolt = <1175000>; -+ regulator-max-microvolt = <1175000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ sw2_reg: ltc3676__sw2 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ sw3_reg: ltc3676__sw3 { -+ regulator-min-microvolt = <1175000>; -+ regulator-max-microvolt = <1175000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ sw4_reg: ltc3676__sw4 { -+ regulator-min-microvolt = <1500000>; -+ regulator-max-microvolt = <1500000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ ldo2_reg: ltc3676__ldo2 { -+ regulator-min-microvolt = <2500000>; -+ regulator-max-microvolt = <2500000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ ldo4_reg: ltc3676__ldo4 { -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ }; -+ }; -+ }; -+}; -+ -+&i2c3 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ status = "okay"; -+ -+ videoin: adv7180@20 { -+ compatible = "adi,adv7180"; -+ reg = <0x20>; -+ }; -+}; -+ -+&iomuxc { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hog>; -+ -+ imx6qdl-gw51xx { -+ pinctrl_hog: hoggrp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* MEZZ_DIO0 */ -+ MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* MEZZ_DIO1 */ -+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */ -+ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */ -+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */ -+ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x80000000 /* PCIE_RST# */ -+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */ -+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */ -+ >; -+ }; -+ -+ pinctrl_enet: enetgrp { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 -+ >; -+ }; -+ -+ pinctrl_gpmi_nand: gpminandgrp { -+ fsl,pins = < -+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -+ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 -+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -+ >; -+ }; -+ -+ pinctrl_i2c1: i2c1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_uart1: uart1grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart2: uart2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart3: uart3grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart5: uart5grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 -+ >; -+ }; -+ }; -+}; -+ -+&pcie { -+ reset-gpio = <&gpio1 0 0>; -+ status = "okay"; -+}; -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart1>; -+ status = "okay"; -+}; -+ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart2>; -+ status = "okay"; -+}; -+ -+&uart3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart3>; -+ status = "okay"; -+}; -+ -+&uart5 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart5>; -+ status = "okay"; -+}; -+ -+&usbotg { -+ vbus-supply = <®_usb_otg_vbus>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ disable-over-current; -+ status = "okay"; -+}; -+ -+&usbh1 { -+ status = "okay"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi -@@ -0,0 +1,528 @@ -+/* -+ * Copyright 2013 Gateworks Corporation -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+/ { -+ /* these are used by bootloader for disabling nodes */ -+ aliases { -+ ethernet0 = &fec; -+ led0 = &led0; -+ led1 = &led1; -+ led2 = &led2; -+ nand = &gpmi; -+ ssi0 = &ssi1; -+ usb0 = &usbh1; -+ usb1 = &usbotg; -+ usdhc2 = &usdhc3; -+ }; -+ -+ chosen { -+ bootargs = "console=ttymxc1,115200"; -+ }; -+ -+ backlight { -+ compatible = "pwm-backlight"; -+ pwms = <&pwm4 0 5000000>; -+ brightness-levels = <0 4 8 16 32 64 128 255>; -+ default-brightness-level = <7>; -+ status = "okay"; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ led0: user1 { -+ label = "user1"; -+ gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */ -+ default-state = "on"; -+ linux,default-trigger = "heartbeat"; -+ }; -+ -+ led1: user2 { -+ label = "user2"; -+ gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */ -+ default-state = "off"; -+ }; -+ -+ led2: user3 { -+ label = "user3"; -+ gpios = <&gpio4 15 1>; /* 111 - MX6_LOCLED# */ -+ default-state = "off"; -+ }; -+ }; -+ -+ memory { -+ reg = <0x10000000 0x20000000>; -+ }; -+ -+ pps { -+ compatible = "pps-gpio"; -+ gpios = <&gpio1 26 0>; -+ status = "okay"; -+ }; -+ -+ regulators { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ reg_1p0v: regulator@0 { -+ compatible = "regulator-fixed"; -+ reg = <0>; -+ regulator-name = "1P0V"; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1000000>; -+ regulator-always-on; -+ }; -+ -+ /* remove this fixed regulator once ltc3676__sw2 driver available */ -+ reg_1p8v: regulator@1 { -+ compatible = "regulator-fixed"; -+ reg = <1>; -+ regulator-name = "1P8V"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-always-on; -+ }; -+ -+ reg_3p3v: regulator@2 { -+ compatible = "regulator-fixed"; -+ reg = <2>; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ reg_5p0v: regulator@3 { -+ compatible = "regulator-fixed"; -+ reg = <3>; -+ regulator-name = "5P0V"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+ -+ reg_usb_otg_vbus: regulator@4 { -+ compatible = "regulator-fixed"; -+ reg = <4>; -+ regulator-name = "usb_otg_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&gpio3 22 0>; -+ enable-active-high; -+ }; -+ }; -+ -+ sound { -+ compatible = "fsl,imx6q-ventana-sgtl5000", -+ "fsl,imx-audio-sgtl5000"; -+ model = "sgtl5000-audio"; -+ ssi-controller = <&ssi1>; -+ audio-codec = <&codec>; -+ audio-routing = -+ "MIC_IN", "Mic Jack", -+ "Mic Jack", "Mic Bias", -+ "Headphone Jack", "HP_OUT"; -+ mux-int-port = <1>; -+ mux-ext-port = <4>; -+ }; -+}; -+ -+&audmux { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_audmux>; -+ status = "okay"; -+}; -+ -+&fec { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_enet>; -+ phy-mode = "rgmii"; -+ phy-reset-gpios = <&gpio1 30 0>; -+ status = "okay"; -+}; -+ -+&gpmi { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpmi_nand>; -+ status = "okay"; -+}; -+ -+&i2c1 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1>; -+ status = "okay"; -+ -+ eeprom1: eeprom@50 { -+ compatible = "atmel,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ eeprom2: eeprom@51 { -+ compatible = "atmel,24c02"; -+ reg = <0x51>; -+ pagesize = <16>; -+ }; -+ -+ eeprom3: eeprom@52 { -+ compatible = "atmel,24c02"; -+ reg = <0x52>; -+ pagesize = <16>; -+ }; -+ -+ eeprom4: eeprom@53 { -+ compatible = "atmel,24c02"; -+ reg = <0x53>; -+ pagesize = <16>; -+ }; -+ -+ gpio: pca9555@23 { -+ compatible = "nxp,pca9555"; -+ reg = <0x23>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; -+ -+ hwmon: gsc@29 { -+ compatible = "gw,gsp"; -+ reg = <0x29>; -+ }; -+ -+ rtc: ds1672@68 { -+ compatible = "dallas,ds1672"; -+ reg = <0x68>; -+ }; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c2>; -+ status = "okay"; -+ -+ pciswitch: pex8609@3f { -+ compatible = "plx,pex8609"; -+ reg = <0x3f>; -+ }; -+ -+ pmic: ltc3676@3c { -+ compatible = "ltc,ltc3676"; -+ reg = <0x3c>; -+ -+ regulators { -+ sw1_reg: ltc3676__sw1 { -+ regulator-min-microvolt = <1175000>; -+ regulator-max-microvolt = <1175000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ sw2_reg: ltc3676__sw2 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ sw3_reg: ltc3676__sw3 { -+ regulator-min-microvolt = <1175000>; -+ regulator-max-microvolt = <1175000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ sw4_reg: ltc3676__sw4 { -+ regulator-min-microvolt = <1500000>; -+ regulator-max-microvolt = <1500000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ ldo2_reg: ltc3676__ldo2 { -+ regulator-min-microvolt = <2500000>; -+ regulator-max-microvolt = <2500000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ ldo3_reg: ltc3676__ldo3 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ ldo4_reg: ltc3676__ldo4 { -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ }; -+ }; -+ }; -+}; -+ -+&i2c3 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ status = "okay"; -+ -+ accelerometer: fxos8700@1e { -+ compatible = "fsl,fxos8700"; -+ reg = <0x13>; -+ }; -+ -+ codec: sgtl5000@0a { -+ compatible = "fsl,sgtl5000"; -+ reg = <0x0a>; -+ clocks = <&clks 201>; -+ VDDA-supply = <®_1p8v>; -+ VDDIO-supply = <®_3p3v>; -+ }; -+ -+ touchscreen: egalax_ts@04 { -+ compatible = "eeti,egalax_ts"; -+ reg = <0x04>; -+ interrupt-parent = <&gpio7>; -+ interrupts = <12 2>; /* gpio7_12 active low */ -+ wakeup-gpios = <&gpio7 12 0>; -+ }; -+ -+ videoin: adv7180@20 { -+ compatible = "adi,adv7180"; -+ reg = <0x20>; -+ }; -+}; -+ -+&iomuxc { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hog>; -+ -+ imx6qdl-gw52xx { -+ pinctrl_hog: hoggrp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* MEZZ_DIO0 */ -+ MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* MEZZ_DIO1 */ -+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */ -+ MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x80000000 /* VIDDEC_PDN# */ -+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */ -+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE_RST# */ -+ MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_PWDN */ -+ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */ -+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */ -+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* USB_SEL_PCI */ -+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */ -+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */ -+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */ -+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */ -+ MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x80000000 /* LVDS_TCH# */ -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* SD3_CD# */ -+ MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x80000000 /* UART2_EN# */ -+ >; -+ }; -+ -+ pinctrl_audmux: audmuxgrp { -+ fsl,pins = < -+ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0 -+ MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0 -+ MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0 -+ MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0 -+ >; -+ }; -+ -+ pinctrl_enet: enetgrp { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 -+ >; -+ }; -+ -+ pinctrl_gpmi_nand: gpminandgrp { -+ fsl,pins = < -+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -+ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 -+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -+ >; -+ }; -+ -+ pinctrl_i2c1: i2c1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_pwm4: pwm4grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart1: uart1grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart2: uart2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart5: uart5grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 -+ >; -+ }; -+ -+ pinctrl_usdhc3: usdhc3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 -+ >; -+ }; -+ }; -+}; -+ -+&ldb { -+ status = "okay"; -+ -+ lvds-channel@0 { -+ fsl,data-mapping = "spwg"; -+ fsl,data-width = <18>; -+ status = "okay"; -+ -+ display-timings { -+ native-mode = <&timing0>; -+ timing0: hsd100pxn1 { -+ clock-frequency = <65000000>; -+ hactive = <1024>; -+ vactive = <768>; -+ hback-porch = <220>; -+ hfront-porch = <40>; -+ vback-porch = <21>; -+ vfront-porch = <7>; -+ hsync-len = <60>; -+ vsync-len = <10>; -+ }; -+ }; -+ }; -+}; -+ -+&pcie { -+ reset-gpio = <&gpio1 29 0>; -+ status = "okay"; -+}; -+ -+&pwm4 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm4>; -+ status = "okay"; -+}; -+ -+&ssi1 { -+ fsl,mode = "i2s-slave"; -+ status = "okay"; -+}; -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart1>; -+ status = "okay"; -+}; -+ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart2>; -+ status = "okay"; -+}; -+ -+&uart5 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart5>; -+ status = "okay"; -+}; -+ -+&usbotg { -+ vbus-supply = <®_usb_otg_vbus>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ disable-over-current; -+ status = "okay"; -+}; -+ -+&usbh1 { -+ status = "okay"; -+}; -+ -+&usdhc3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usdhc3>; -+ cd-gpios = <&gpio7 0 0>; -+ vmmc-supply = <®_3p3v>; -+ status = "okay"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi -@@ -0,0 +1,573 @@ -+/* -+ * Copyright 2013 Gateworks Corporation -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+/ { -+ /* these are used by bootloader for disabling nodes */ -+ aliases { -+ can0 = &can1; -+ ethernet0 = &fec; -+ ethernet1 = ð1; -+ led0 = &led0; -+ led1 = &led1; -+ led2 = &led2; -+ nand = &gpmi; -+ sky2 = ð1; -+ ssi0 = &ssi1; -+ usb0 = &usbh1; -+ usb1 = &usbotg; -+ usdhc2 = &usdhc3; -+ }; -+ -+ chosen { -+ bootargs = "console=ttymxc1,115200"; -+ }; -+ -+ backlight { -+ compatible = "pwm-backlight"; -+ pwms = <&pwm4 0 5000000>; -+ brightness-levels = <0 4 8 16 32 64 128 255>; -+ default-brightness-level = <7>; -+ status = "okay"; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ led0: user1 { -+ label = "user1"; -+ gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */ -+ default-state = "on"; -+ linux,default-trigger = "heartbeat"; -+ }; -+ -+ led1: user2 { -+ label = "user2"; -+ gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */ -+ default-state = "off"; -+ }; -+ -+ led2: user3 { -+ label = "user3"; -+ gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */ -+ default-state = "off"; -+ }; -+ }; -+ -+ memory { -+ reg = <0x10000000 0x40000000>; -+ }; -+ -+ pps { -+ compatible = "pps-gpio"; -+ gpios = <&gpio1 26 0>; -+ status = "okay"; -+ }; -+ -+ regulators { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ reg_1p0v: regulator@0 { -+ compatible = "regulator-fixed"; -+ reg = <0>; -+ regulator-name = "1P0V"; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1000000>; -+ regulator-always-on; -+ }; -+ -+ /* remove when pmic 1p8 regulator available */ -+ reg_1p8v: regulator@1 { -+ compatible = "regulator-fixed"; -+ reg = <1>; -+ regulator-name = "1P8V"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-always-on; -+ }; -+ -+ reg_3p3v: regulator@2 { -+ compatible = "regulator-fixed"; -+ reg = <2>; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ reg_usb_h1_vbus: regulator@3 { -+ compatible = "regulator-fixed"; -+ reg = <3>; -+ regulator-name = "usb_h1_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+ -+ reg_usb_otg_vbus: regulator@4 { -+ compatible = "regulator-fixed"; -+ reg = <4>; -+ regulator-name = "usb_otg_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&gpio3 22 0>; -+ enable-active-high; -+ }; -+ }; -+ -+ sound { -+ compatible = "fsl,imx6q-ventana-sgtl5000", -+ "fsl,imx-audio-sgtl5000"; -+ model = "sgtl5000-audio"; -+ ssi-controller = <&ssi1>; -+ audio-codec = <&codec>; -+ audio-routing = -+ "MIC_IN", "Mic Jack", -+ "Mic Jack", "Mic Bias", -+ "Headphone Jack", "HP_OUT"; -+ mux-int-port = <1>; -+ mux-ext-port = <4>; -+ }; -+}; -+ -+&audmux { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_audmux>; -+ status = "okay"; -+}; -+ -+&can1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_flexcan1>; -+ status = "okay"; -+}; -+ -+&fec { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_enet>; -+ phy-mode = "rgmii"; -+ phy-reset-gpios = <&gpio1 30 0>; -+ status = "okay"; -+}; -+ -+&gpmi { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpmi_nand>; -+ status = "okay"; -+}; -+ -+&i2c1 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1>; -+ status = "okay"; -+ -+ eeprom1: eeprom@50 { -+ compatible = "atmel,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ eeprom2: eeprom@51 { -+ compatible = "atmel,24c02"; -+ reg = <0x51>; -+ pagesize = <16>; -+ }; -+ -+ eeprom3: eeprom@52 { -+ compatible = "atmel,24c02"; -+ reg = <0x52>; -+ pagesize = <16>; -+ }; -+ -+ eeprom4: eeprom@53 { -+ compatible = "atmel,24c02"; -+ reg = <0x53>; -+ pagesize = <16>; -+ }; -+ -+ gpio: pca9555@23 { -+ compatible = "nxp,pca9555"; -+ reg = <0x23>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; -+ -+ hwmon: gsc@29 { -+ compatible = "gw,gsp"; -+ reg = <0x29>; -+ }; -+ -+ rtc: ds1672@68 { -+ compatible = "dallas,ds1672"; -+ reg = <0x68>; -+ }; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c2>; -+ status = "okay"; -+ -+ pciclkgen: si53156@6b { -+ compatible = "sil,si53156"; -+ reg = <0x6b>; -+ }; -+ -+ pciswitch: pex8606@3f { -+ compatible = "plx,pex8606"; -+ reg = <0x3f>; -+ }; -+ -+ pmic: ltc3676@3c { -+ compatible = "ltc,ltc3676"; -+ reg = <0x3c>; -+ -+ regulators { -+ /* VDD_SOC */ -+ sw1_reg: ltc3676__sw1 { -+ regulator-min-microvolt = <1175000>; -+ regulator-max-microvolt = <1175000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ /* VDD_1P8 */ -+ sw2_reg: ltc3676__sw2 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ /* VDD_ARM */ -+ sw3_reg: ltc3676__sw3 { -+ regulator-min-microvolt = <1175000>; -+ regulator-max-microvolt = <1175000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ /* VDD_DDR */ -+ sw4_reg: ltc3676__sw4 { -+ regulator-min-microvolt = <1500000>; -+ regulator-max-microvolt = <1500000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ /* VDD_2P5 */ -+ ldo2_reg: ltc3676__ldo2 { -+ regulator-min-microvolt = <2500000>; -+ regulator-max-microvolt = <2500000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ /* VDD_1P8 */ -+ ldo3_reg: ltc3676__ldo3 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ /* VDD_HIGH */ -+ ldo4_reg: ltc3676__ldo4 { -+ regulator-min-microvolt = <3000000>; -+ regulator-max-microvolt = <3000000>; -+ }; -+ }; -+ }; -+}; -+ -+&i2c3 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ status = "okay"; -+ -+ accelerometer: fxos8700@1e { -+ compatible = "fsl,fxos8700"; -+ reg = <0x1e>; -+ }; -+ -+ codec: sgtl5000@0a { -+ compatible = "fsl,sgtl5000"; -+ reg = <0x0a>; -+ clocks = <&clks 201>; -+ VDDA-supply = <®_1p8v>; -+ VDDIO-supply = <®_3p3v>; -+ }; -+ -+ hdmiin: adv7611@4c { -+ compatible = "adi,adv7611"; -+ reg = <0x4c>; -+ }; -+ -+ touchscreen: egalax_ts@04 { -+ compatible = "eeti,egalax_ts"; -+ reg = <0x04>; -+ interrupt-parent = <&gpio1>; -+ interrupts = <11 2>; /* gpio1_11 active low */ -+ wakeup-gpios = <&gpio1 11 0>; -+ }; -+ -+ videoout: adv7393@2a { -+ compatible = "adi,adv7393"; -+ reg = <0x2a>; -+ }; -+ -+ videoin: adv7180@20 { -+ compatible = "adi,adv7180"; -+ reg = <0x20>; -+ }; -+}; -+ -+&iomuxc { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hog>; -+ -+ imx6qdl-gw53xx { -+ pinctrl_hog: hoggrp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* PCIE6EXP_DIO0 */ -+ MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* PCIE6EXP_DIO1 */ -+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */ -+ MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_SHDN */ -+ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */ -+ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */ -+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */ -+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */ -+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAN_STBY */ -+ MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x80000000 /* PMIC_IRQ# */ -+ MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000 /* HUB_RST# */ -+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* PCIE_WDIS# */ -+ MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x80000000 /* ACCEL_IRQ# */ -+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */ -+ MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x80000000 /* USBOTG_OC# */ -+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */ -+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */ -+ MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x80000000 /* TOUCH_IRQ# */ -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* SD3_DET# */ -+ >; -+ }; -+ -+ pinctrl_audmux: audmuxgrp { -+ fsl,pins = < -+ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0 -+ MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0 -+ MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0 -+ MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0 -+ >; -+ }; -+ -+ pinctrl_enet: enetgrp { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 -+ >; -+ }; -+ -+ pinctrl_flexcan1: flexcan1grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000 -+ MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000 -+ >; -+ }; -+ -+ pinctrl_gpmi_nand: gpminandgrp { -+ fsl,pins = < -+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -+ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 -+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -+ >; -+ }; -+ -+ pinctrl_i2c1: i2c1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_pwm4: pwm4grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart1: uart1grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart2: uart2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart5: uart5grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 -+ >; -+ }; -+ -+ pinctrl_usdhc3: usdhc3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 -+ >; -+ }; -+ }; -+}; -+ -+&ldb { -+ status = "okay"; -+ -+ lvds-channel@0 { -+ fsl,data-mapping = "spwg"; -+ fsl,data-width = <18>; -+ status = "okay"; -+ -+ display-timings { -+ native-mode = <&timing0>; -+ timing0: hsd100pxn1 { -+ clock-frequency = <65000000>; -+ hactive = <1024>; -+ vactive = <768>; -+ hback-porch = <220>; -+ hfront-porch = <40>; -+ vback-porch = <21>; -+ vfront-porch = <7>; -+ hsync-len = <60>; -+ vsync-len = <10>; -+ }; -+ }; -+ }; -+}; -+ -+&pcie { -+ reset-gpio = <&gpio1 29 0>; -+ status = "okay"; -+ -+ eth1: sky2@8 { /* MAC/PHY on bus 8 */ -+ compatible = "marvell,sky2"; -+ }; -+}; -+ -+&pwm4 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm4>; -+ status = "okay"; -+}; -+ -+&ssi1 { -+ fsl,mode = "i2s-slave"; -+ status = "okay"; -+}; -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart1>; -+ status = "okay"; -+}; -+ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart2>; -+ status = "okay"; -+}; -+ -+&uart5 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart5>; -+ status = "okay"; -+}; -+ -+&usbotg { -+ vbus-supply = <®_usb_otg_vbus>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ disable-over-current; -+ status = "okay"; -+}; -+ -+&usbh1 { -+ vbus-supply = <®_usb_h1_vbus>; -+ status = "okay"; -+}; -+ -+&usdhc3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usdhc3>; -+ cd-gpios = <&gpio7 0 0>; -+ vmmc-supply = <®_3p3v>; -+ status = "okay"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi -@@ -0,0 +1,600 @@ -+/* -+ * Copyright 2013 Gateworks Corporation -+ * -+ * The code contained herein is licensed under the GNU General Public -+ * License. You may obtain a copy of the GNU General Public License -+ * Version 2 or later at the following locations: -+ * -+ * http://www.opensource.org/licenses/gpl-license.html -+ * http://www.gnu.org/copyleft/gpl.html -+ */ -+ -+/ { -+ /* these are used by bootloader for disabling nodes */ -+ aliases { -+ can0 = &can1; -+ ethernet0 = &fec; -+ ethernet1 = ð1; -+ led0 = &led0; -+ led1 = &led1; -+ led2 = &led2; -+ nand = &gpmi; -+ sky2 = ð1; -+ ssi0 = &ssi1; -+ usb0 = &usbh1; -+ usb1 = &usbotg; -+ usdhc2 = &usdhc3; -+ }; -+ -+ chosen { -+ bootargs = "console=ttymxc1,115200"; -+ }; -+ -+ backlight { -+ compatible = "pwm-backlight"; -+ pwms = <&pwm4 0 5000000>; -+ brightness-levels = <0 4 8 16 32 64 128 255>; -+ default-brightness-level = <7>; -+ status = "okay"; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ led0: user1 { -+ label = "user1"; -+ gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */ -+ default-state = "on"; -+ linux,default-trigger = "heartbeat"; -+ }; -+ -+ led1: user2 { -+ label = "user2"; -+ gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */ -+ default-state = "off"; -+ }; -+ -+ led2: user3 { -+ label = "user3"; -+ gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */ -+ default-state = "off"; -+ }; -+ }; -+ -+ memory { -+ reg = <0x10000000 0x40000000>; -+ }; -+ -+ pps { -+ compatible = "pps-gpio"; -+ gpios = <&gpio1 26 0>; -+ status = "okay"; -+ }; -+ -+ regulators { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ reg_1p0v: regulator@0 { -+ compatible = "regulator-fixed"; -+ reg = <0>; -+ regulator-name = "1P0V"; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1000000>; -+ regulator-always-on; -+ }; -+ -+ reg_3p3v: regulator@1 { -+ compatible = "regulator-fixed"; -+ reg = <1>; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ reg_usb_h1_vbus: regulator@2 { -+ compatible = "regulator-fixed"; -+ reg = <2>; -+ regulator-name = "usb_h1_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+ -+ reg_usb_otg_vbus: regulator@3 { -+ compatible = "regulator-fixed"; -+ reg = <3>; -+ regulator-name = "usb_otg_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&gpio3 22 0>; -+ enable-active-high; -+ }; -+ }; -+ -+ sound { -+ compatible = "fsl,imx6q-ventana-sgtl5000", -+ "fsl,imx-audio-sgtl5000"; -+ model = "sgtl5000-audio"; -+ ssi-controller = <&ssi1>; -+ audio-codec = <&codec>; -+ audio-routing = -+ "MIC_IN", "Mic Jack", -+ "Mic Jack", "Mic Bias", -+ "Headphone Jack", "HP_OUT"; -+ mux-int-port = <1>; -+ mux-ext-port = <4>; -+ }; -+}; -+ -+&audmux { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */ -+ status = "okay"; -+}; -+ -+&can1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_flexcan1>; -+ status = "okay"; -+}; -+ -+&fec { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_enet>; -+ phy-mode = "rgmii"; -+ phy-reset-gpios = <&gpio1 30 0>; -+ status = "okay"; -+}; -+ -+&gpmi { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpmi_nand>; -+ status = "okay"; -+}; -+ -+&i2c1 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1>; -+ status = "okay"; -+ -+ eeprom1: eeprom@50 { -+ compatible = "atmel,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ eeprom2: eeprom@51 { -+ compatible = "atmel,24c02"; -+ reg = <0x51>; -+ pagesize = <16>; -+ }; -+ -+ eeprom3: eeprom@52 { -+ compatible = "atmel,24c02"; -+ reg = <0x52>; -+ pagesize = <16>; -+ }; -+ -+ eeprom4: eeprom@53 { -+ compatible = "atmel,24c02"; -+ reg = <0x53>; -+ pagesize = <16>; -+ }; -+ -+ gpio: pca9555@23 { -+ compatible = "nxp,pca9555"; -+ reg = <0x23>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; -+ -+ hwmon: gsc@29 { -+ compatible = "gw,gsp"; -+ reg = <0x29>; -+ }; -+ -+ rtc: ds1672@68 { -+ compatible = "dallas,ds1672"; -+ reg = <0x68>; -+ }; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c2>; -+ status = "okay"; -+ -+ pmic: pfuze100@08 { -+ compatible = "fsl,pfuze100"; -+ reg = <0x08>; -+ -+ regulators { -+ sw1a_reg: sw1ab { -+ regulator-min-microvolt = <300000>; -+ regulator-max-microvolt = <1875000>; -+ regulator-boot-on; -+ regulator-always-on; -+ regulator-ramp-delay = <6250>; -+ }; -+ -+ sw1c_reg: sw1c { -+ regulator-min-microvolt = <300000>; -+ regulator-max-microvolt = <1875000>; -+ regulator-boot-on; -+ regulator-always-on; -+ regulator-ramp-delay = <6250>; -+ }; -+ -+ sw2_reg: sw2 { -+ regulator-min-microvolt = <800000>; -+ regulator-max-microvolt = <3950000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ sw3a_reg: sw3a { -+ regulator-min-microvolt = <400000>; -+ regulator-max-microvolt = <1975000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ sw3b_reg: sw3b { -+ regulator-min-microvolt = <400000>; -+ regulator-max-microvolt = <1975000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ sw4_reg: sw4 { -+ regulator-min-microvolt = <800000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ -+ swbst_reg: swbst { -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5150000>; -+ }; -+ -+ snvs_reg: vsnvs { -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <3000000>; -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ vref_reg: vrefddr { -+ regulator-boot-on; -+ regulator-always-on; -+ }; -+ -+ vgen1_reg: vgen1 { -+ regulator-min-microvolt = <800000>; -+ regulator-max-microvolt = <1550000>; -+ }; -+ -+ vgen2_reg: vgen2 { -+ regulator-min-microvolt = <800000>; -+ regulator-max-microvolt = <1550000>; -+ }; -+ -+ vgen3_reg: vgen3 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ -+ vgen4_reg: vgen4 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ vgen5_reg: vgen5 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ vgen6_reg: vgen6 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ }; -+ }; -+ -+ pciswitch: pex8609@3f { -+ compatible = "plx,pex8609"; -+ reg = <0x3f>; -+ }; -+ -+ pciclkgen: si52147@6b { -+ compatible = "sil,si52147"; -+ reg = <0x6b>; -+ }; -+}; -+ -+&i2c3 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ status = "okay"; -+ -+ accelerometer: fxos8700@1e { -+ compatible = "fsl,fxos8700"; -+ reg = <0x1e>; -+ }; -+ -+ codec: sgtl5000@0a { -+ compatible = "fsl,sgtl5000"; -+ reg = <0x0a>; -+ clocks = <&clks 201>; -+ VDDA-supply = <&sw4_reg>; -+ VDDIO-supply = <®_3p3v>; -+ }; -+ -+ hdmiin: adv7611@4c { -+ compatible = "adi,adv7611"; -+ reg = <0x4c>; -+ }; -+ -+ touchscreen: egalax_ts@04 { -+ compatible = "eeti,egalax_ts"; -+ reg = <0x04>; -+ interrupt-parent = <&gpio7>; -+ interrupts = <12 2>; /* gpio7_12 active low */ -+ wakeup-gpios = <&gpio7 12 0>; -+ }; -+ -+ videoout: adv7393@2a { -+ compatible = "adi,adv7393"; -+ reg = <0x2a>; -+ }; -+ -+ videoin: adv7180@20 { -+ compatible = "adi,adv7180"; -+ reg = <0x20>; -+ }; -+}; -+ -+&iomuxc { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hog>; -+ -+ imx6qdl-gw54xx { -+ pinctrl_hog: hoggrp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */ -+ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 /* SPINOR_CS0# */ -+ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */ -+ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */ -+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */ -+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */ -+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAN_STBY */ -+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */ -+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */ -+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */ -+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */ -+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 /* USBHUB_RST# */ -+ MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 /* MIPI_DIO */ -+ >; -+ }; -+ -+ pinctrl_audmux: audmuxgrp { -+ fsl,pins = < -+ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0 -+ MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0 -+ MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0 -+ MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0 -+ >; -+ }; -+ -+ pinctrl_enet: enetgrp { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 -+ >; -+ }; -+ -+ pinctrl_flexcan1: flexcan1grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000 -+ MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000 -+ >; -+ }; -+ -+ pinctrl_gpmi_nand: gpminandgrp { -+ fsl,pins = < -+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -+ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 -+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -+ >; -+ }; -+ -+ pinctrl_i2c1: i2c1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_pwm4: pwm4grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart1: uart1grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart2: uart2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart5: uart5grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 -+ >; -+ }; -+ -+ pinctrl_usdhc3: usdhc3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 -+ >; -+ }; -+ }; -+}; -+ -+&ldb { -+ status = "okay"; -+ -+ lvds-channel@0 { -+ fsl,data-mapping = "spwg"; -+ fsl,data-width = <18>; -+ status = "okay"; -+ -+ display-timings { -+ native-mode = <&timing0>; -+ timing0: hsd100pxn1 { -+ clock-frequency = <65000000>; -+ hactive = <1024>; -+ vactive = <768>; -+ hback-porch = <220>; -+ hfront-porch = <40>; -+ vback-porch = <21>; -+ vfront-porch = <7>; -+ hsync-len = <60>; -+ vsync-len = <10>; -+ }; -+ }; -+ }; -+}; -+ -+&pcie { -+ reset-gpio = <&gpio1 29 0>; -+ status = "okay"; -+ -+ eth1: sky2@8 { /* MAC/PHY on bus 8 */ -+ compatible = "marvell,sky2"; -+ }; -+}; -+ -+&pwm4 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm4>; -+ status = "okay"; -+}; -+ -+&ssi1 { -+ fsl,mode = "i2s-slave"; -+ status = "okay"; -+}; -+ -+&ssi2 { -+ fsl,mode = "i2s-slave"; -+ status = "okay"; -+}; -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart1>; -+ status = "okay"; -+}; -+ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart2>; -+ status = "okay"; -+}; -+ -+&uart5 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart5>; -+ status = "okay"; -+}; -+ -+&usbotg { -+ vbus-supply = <®_usb_otg_vbus>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ disable-over-current; -+ status = "okay"; -+}; -+ -+&usbh1 { -+ vbus-supply = <®_usb_h1_vbus>; -+ status = "okay"; -+}; -+ -+&usdhc3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usdhc3>; -+ cd-gpios = <&gpio7 0 0>; -+ vmmc-supply = <®_3p3v>; -+ status = "okay"; -+}; diff --git a/target/linux/imx6/patches-3.14/0050-sky2-allow-mac-to-come-from-dt.patch b/target/linux/imx6/patches-3.14/0050-sky2-allow-mac-to-come-from-dt.patch deleted file mode 100644 index bab418bf26..0000000000 --- a/target/linux/imx6/patches-3.14/0050-sky2-allow-mac-to-come-from-dt.patch +++ /dev/null @@ -1,69 +0,0 @@ -From: Tim Harvey <tharvey@gateworks.com> -Subject: [PATCH] sky2: allow mac to come from dt - -The driver reads the mac address from the device registers which would -need to have been programmed by the bootloader. This patch adds -the ability to pull the mac from devicetree via the aliases/sky2 node. - -Signed-off-by: Tim Harvey <tharvey@gateworks.com> ---- - drivers/net/ethernet/marvell/sky2.c | 33 ++++++++++++++++++++++++++++++++- - 1 file changed, 32 insertions(+), 1 deletion(-) - ---- a/drivers/net/ethernet/marvell/sky2.c -+++ b/drivers/net/ethernet/marvell/sky2.c -@@ -44,6 +44,8 @@ - #include <linux/prefetch.h> - #include <linux/debugfs.h> - #include <linux/mii.h> -+#include <linux/of_device.h> -+#include <linux/of_net.h> - - #include <asm/irq.h> - -@@ -4748,6 +4750,7 @@ static struct net_device *sky2_init_netd - { - struct sky2_port *sky2; - struct net_device *dev = alloc_etherdev(sizeof(*sky2)); -+ unsigned char *iap, tmpaddr[ETH_ALEN]; - - if (!dev) - return NULL; -@@ -4805,8 +4808,36 @@ static struct net_device *sky2_init_netd - - dev->features |= dev->hw_features; - -+ /* -+ * try to get mac address in the following order: -+ * 1) from device tree data -+ * 2) from internal registers set by bootloader -+ */ -+ iap = NULL; -+ if (IS_ENABLED(CONFIG_OF)) { -+ struct device_node *np; -+ np = of_find_node_by_path("/aliases"); -+ if (np) { -+ const char *path = of_get_property(np, "sky2", NULL); -+ if (path) -+ np = of_find_node_by_path(path); -+ if (np) -+ path = of_get_mac_address(np); -+ if (path) -+ iap = (unsigned char *) path; -+ } -+ } -+ -+ /* -+ * 2) mac registers set by bootloader -+ */ -+ if (!iap || !is_valid_ether_addr(iap)) { -+ memcpy_fromio(&tmpaddr, hw->regs + B2_MAC_1 + port * 8, ETH_ALEN); -+ iap = &tmpaddr[0]; -+ } -+ - /* read the mac address */ -- memcpy_fromio(dev->dev_addr, hw->regs + B2_MAC_1 + port * 8, ETH_ALEN); -+ memcpy(dev->dev_addr, iap, ETH_ALEN); - - return dev; - } diff --git a/target/linux/imx6/patches-3.14/0055-ARM_dts_imx_fix-invallid-#address-cells-value.patch b/target/linux/imx6/patches-3.14/0055-ARM_dts_imx_fix-invallid-#address-cells-value.patch deleted file mode 100644 index 79472e8899..0000000000 --- a/target/linux/imx6/patches-3.14/0055-ARM_dts_imx_fix-invallid-#address-cells-value.patch +++ /dev/null @@ -1,55 +0,0 @@ -commit d644122d8420c425fdf5c74e50d440d5f146bc0c -Author: Tim Harvey <tharvey@gateworks.com> -Date: Thu Mar 13 09:37:51 2014 -0700 - - ARM: dts: imx: fix invalid #address-cells value - - The invalid value of #address-cells in the imx6 pcie host controller node - causes of_irq_parse_raw() to incorrectly advance through an interrupt-map - table of more than one interrupt. We also take the opportunity to drop the - unused #size-cells here. - - This patch resolves this issue and allows proper interrupt mapping for an - imx6 pcie host connected to a P2P bridge when using legacy interrupts. - - Signed-off-by: Tim Harvey <tharvey@gateworks.com> - Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> - Cc: Jingoo Han <jg1.han@samsung.com> - Cc: Lucas Stach <l.stach@pengutronix.de> - Cc: Mark Rutland <mark.rutland@arm.com> - Cc: linux-samsung-soc <linux-samsung-soc@vger.kernel.org> - Cc: Richard Zhu <r65037@freescale.com> - Cc: Sascha Hauer <kernel@pengutronix.de> - Cc: Arnd Bergmann <arnd@arndb.de> - Cc: Stephen Warren <swarren@wwwdotorg.org> - Cc: Bjorn Helgaas <bhelgaas@google.com> - Cc: Simon Horman <horms@verge.net.au> - Cc: Thierry Reding <thierry.reding@gmail.com> - Cc: Ben Dooks <ben-linux@fluff.org> - Cc: linux-tegra <linux-tegra@vger.kernel.org> - Cc: Kukjin Kim <kgene.kim@samsung.com> - Cc: Shawn Guo <shawn.guo@linaro.org> - Cc: Grant Likely <grant.likely@linaro.org> - ---- a/arch/arm/boot/dts/imx6qdl.dtsi -+++ b/arch/arm/boot/dts/imx6qdl.dtsi -@@ -38,8 +38,6 @@ - intc: interrupt-controller@00a01000 { - compatible = "arm,cortex-a9-gic"; - #interrupt-cells = <3>; -- #address-cells = <1>; -- #size-cells = <1>; - interrupt-controller; - reg = <0x00a01000 0x1000>, - <0x00a00100 0x100>; ---- a/arch/arm/boot/dts/imx6sl.dtsi -+++ b/arch/arm/boot/dts/imx6sl.dtsi -@@ -44,8 +44,6 @@ - intc: interrupt-controller@00a01000 { - compatible = "arm,cortex-a9-gic"; - #interrupt-cells = <3>; -- #address-cells = <1>; -- #size-cells = <1>; - interrupt-controller; - reg = <0x00a01000 0x1000>, - <0x00a00100 0x100>; diff --git a/target/linux/imx6/patches-3.14/0060-pci_designware_use-new-OF-interrupt-mapping-when-possible.patch b/target/linux/imx6/patches-3.14/0060-pci_designware_use-new-OF-interrupt-mapping-when-possible.patch deleted file mode 100644 index fff074a1ed..0000000000 --- a/target/linux/imx6/patches-3.14/0060-pci_designware_use-new-OF-interrupt-mapping-when-possible.patch +++ /dev/null @@ -1,58 +0,0 @@ -commit 62fe03d1dd629a98c6da86cabb2a98b85e89d516 -Author: Lucas Stach <l.stach@pengutronix.de> -Date: Wed Mar 5 14:25:51 2014 +0100 - - PCI: designware: use new OF interrupt mapping when possible - - This is the recommended method of doing the IRQ - mapping. For old devicetrees we fall back to the - previous practice. - - Signed-off-by: Lucas Stach <l.stach@pengutronix.de> - Acked-by: Arnd Bergmann <arnd@arndb.de> - Acked-by: Jingoo Han <jg1.han@samsung.com> - Reviewed-by: Marek Vasut <marex@denx.de> - ---- a/drivers/pci/host/pcie-designware.c -+++ b/drivers/pci/host/pcie-designware.c -@@ -17,6 +17,7 @@ - #include <linux/module.h> - #include <linux/msi.h> - #include <linux/of_address.h> -+#include <linux/of_pci.h> - #include <linux/pci.h> - #include <linux/pci_regs.h> - #include <linux/types.h> -@@ -492,7 +493,7 @@ int __init dw_pcie_host_init(struct pcie - dw_pci.nr_controllers = 1; - dw_pci.private_data = (void **)&pp; - -- pci_common_init(&dw_pci); -+ pci_common_init_dev(pp->dev, &dw_pci); - pci_assign_unassigned_resources(); - #ifdef CONFIG_PCI_DOMAINS - dw_pci.domain++; -@@ -725,7 +726,7 @@ static struct pci_bus *dw_pcie_scan_bus( - - if (pp) { - pp->root_bus_nr = sys->busnr; -- bus = pci_scan_root_bus(NULL, sys->busnr, &dw_pcie_ops, -+ bus = pci_scan_root_bus(pp->dev, sys->busnr, &dw_pcie_ops, - sys, &sys->resources); - } else { - bus = NULL; -@@ -738,8 +739,13 @@ static struct pci_bus *dw_pcie_scan_bus( - static int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) - { - struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata); -+ int irq; - -- return pp->irq; -+ irq = of_irq_parse_and_map_pci(dev, slot, pin); -+ if (!irq) -+ irq = pp->irq; -+ -+ return irq; - } - - static void dw_pcie_add_bus(struct pci_bus *bus) diff --git a/target/linux/imx6/patches-3.14/0065-ARM-dts-imx6-add-PCIe-interrupt-mapping-properties.patch b/target/linux/imx6/patches-3.14/0065-ARM-dts-imx6-add-PCIe-interrupt-mapping-properties.patch deleted file mode 100644 index 62ca2f33a8..0000000000 --- a/target/linux/imx6/patches-3.14/0065-ARM-dts-imx6-add-PCIe-interrupt-mapping-properties.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 07134a365f1c4be6e840a00ae452d1593f15c5fc Mon Sep 17 00:00:00 2001 -From: Lucas Stach <l.stach@pengutronix.de> -Date: Wed, 5 Mar 2014 14:25:50 +0100 -Subject: [PATCH] ARM: dts: imx6: add PCIe interrupt mapping properties - -As defined by the common PCI bindings. - -Signed-off-by: Lucas Stach <l.stach@pengutronix.de> -Acked-by: Arnd Bergmann <arnd@arndb.de> -Signed-off-by: Shawn Guo <shawn.guo@linaro.org> ---- - arch/arm/boot/dts/imx6qdl.dtsi | 8 ++++++++ - 1 file changed, 8 insertions(+) - ---- a/arch/arm/boot/dts/imx6qdl.dtsi -+++ b/arch/arm/boot/dts/imx6qdl.dtsi -@@ -10,6 +10,8 @@ - * http://www.gnu.org/copyleft/gpl.html - */ - -+#include <dt-bindings/interrupt-controller/arm-gic.h> -+ - #include "skeleton.dtsi" - - / { -@@ -125,6 +127,12 @@ - 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */ - num-lanes = <1>; - interrupts = <0 123 0x04>; -+ #interrupt-cells = <1>; -+ interrupt-map-mask = <0 0 0 0x7>; -+ interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, -+ <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, -+ <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, -+ <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>; - clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi"; - status = "disabled"; diff --git a/target/linux/imx6/patches-3.14/100-bootargs.patch b/target/linux/imx6/patches-3.14/100-bootargs.patch deleted file mode 100644 index 0954391203..0000000000 --- a/target/linux/imx6/patches-3.14/100-bootargs.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/arm/boot/dts/imx6dl-wandboard.dts -+++ b/arch/arm/boot/dts/imx6dl-wandboard.dts -@@ -19,4 +19,8 @@ - memory { - reg = <0x10000000 0x40000000>; - }; -+ -+ chosen { -+ bootargs = "console=ttymxc0,115200"; -+ }; - }; |