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author | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2020-10-19 15:57:40 +0200 |
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committer | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2020-10-19 15:57:40 +0200 |
commit | 21cf17bb4ce5cb0cacb15d3659a544c215590001 (patch) | |
tree | 83e0149d930001faa1bc984f143417a314b1a77f /target/linux/lantiq/patches-4.19/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch | |
parent | f47cb405cafd57a25fceb7630af969e08b2f671c (diff) | |
download | upstream-21cf17bb4ce5cb0cacb15d3659a544c215590001.tar.gz upstream-21cf17bb4ce5cb0cacb15d3659a544c215590001.tar.bz2 upstream-21cf17bb4ce5cb0cacb15d3659a544c215590001.zip |
lantiq: remove support for kernel 4.19
The target uses 5.4 as default kernel since 06/2020.
Kernel 4.19 support is not really maintained anymore, it does not
seem to be needed and upcoming changes (mainly DSA) will break
backward-compatibility anyway.
Thus, make maintaining of old stuff and reviewing of new stuff
easier by removing support for kernel 4.19.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Diffstat (limited to 'target/linux/lantiq/patches-4.19/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch')
-rw-r--r-- | target/linux/lantiq/patches-4.19/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch | 30 |
1 files changed, 0 insertions, 30 deletions
diff --git a/target/linux/lantiq/patches-4.19/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch b/target/linux/lantiq/patches-4.19/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch deleted file mode 100644 index b98abe8b4b..0000000000 --- a/target/linux/lantiq/patches-4.19/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch +++ /dev/null @@ -1,30 +0,0 @@ ---- a/arch/mips/lantiq/xway/sysctrl.c -+++ b/arch/mips/lantiq/xway/sysctrl.c -@@ -424,6 +424,20 @@ static void clkdev_add_clkout(void) - } - } - -+static void set_phy_clock_source(struct device_node *np_cgu) -+{ -+ u32 phy_clk_src, ifcc; -+ -+ if (!np_cgu) -+ return; -+ -+ if (of_property_read_u32(np_cgu, "lantiq,phy-clk-src", &phy_clk_src)) -+ return; -+ -+ ifcc = ltq_cgu_r32(ifccr) & ~(0x1c); -+ ltq_cgu_w32(ifcc | (phy_clk_src << 2), ifccr); -+} -+ - /* bring up all register ranges that we need for basic system control */ - void __init ltq_soc_init(void) - { -@@ -587,4 +601,6 @@ void __init ltq_soc_init(void) - clkdev_add_pmu("1e100400.serial", NULL, 1, 0, PMU_ASC0); - } - usb_set_clock(); -+ -+ set_phy_clock_source(np_cgu); - } |