diff options
author | John Audia <graysky@archlinux.us> | 2020-07-16 07:03:17 -0400 |
---|---|---|
committer | Petr Štetiar <ynezz@true.cz> | 2020-07-17 11:00:33 +0200 |
commit | b6443367d8bca111a64f4c111a872fd100cc7d90 (patch) | |
tree | eb1b9ae308c2ed3149f3c76de40e331b4f0774b9 /target/linux/mediatek | |
parent | 2a43ab4a18b4dfe2f4e39b28b87c60b01e6dfd5c (diff) | |
download | upstream-b6443367d8bca111a64f4c111a872fd100cc7d90.tar.gz upstream-b6443367d8bca111a64f4c111a872fd100cc7d90.tar.bz2 upstream-b6443367d8bca111a64f4c111a872fd100cc7d90.zip |
kernel: bump 5.4 to 5.4.52
update_kernel.sh refreshed all patches, no human interaction was needed
Build system: x86_64
Run-tested: Netgear R7800 (ipq806x)
Signed-off-by: John Audia <graysky@archlinux.us>
Diffstat (limited to 'target/linux/mediatek')
-rw-r--r--[-rwxr-xr-x] | target/linux/mediatek/patches-5.4/0991-dt-bindings-PCI-Mediatek-Update-PCIe-binding.patch | 5 | ||||
-rw-r--r--[-rwxr-xr-x] | target/linux/mediatek/patches-5.4/0992-PCI-mediatek-Use-regmap-to-get-shared-pcie-cfg-base.patch | 16 | ||||
-rw-r--r--[-rwxr-xr-x] | target/linux/mediatek/patches-5.4/0993-arm64-dts-mediatek-Split-PCIe-node-for-MT2712-MT7622.patch | 18 | ||||
-rw-r--r--[-rwxr-xr-x] | target/linux/mediatek/patches-5.4/0994-ARM-dts-mediatek-Update-mt7629-PCIe-node.patch | 10 |
4 files changed, 16 insertions, 33 deletions
diff --git a/target/linux/mediatek/patches-5.4/0991-dt-bindings-PCI-Mediatek-Update-PCIe-binding.patch b/target/linux/mediatek/patches-5.4/0991-dt-bindings-PCI-Mediatek-Update-PCIe-binding.patch index 2c7e311836..02e4c130ea 100755..100644 --- a/target/linux/mediatek/patches-5.4/0991-dt-bindings-PCI-Mediatek-Update-PCIe-binding.patch +++ b/target/linux/mediatek/patches-5.4/0991-dt-bindings-PCI-Mediatek-Update-PCIe-binding.patch @@ -143,9 +143,6 @@ Signed-off-by: chuanjia.liu <Chuanjia.Liu@mediatek.com> 2 files changed, 129 insertions(+), 53 deletions(-) create mode 100644 Documentation/devicetree/bindings/pci/mediatek-pcie-cfg.yaml -diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-cfg.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-cfg.yaml -new file mode 100644 -index 000000000000..4d2835ab4858 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-cfg.yaml @@ -0,0 +1,38 @@ @@ -187,8 +184,6 @@ index 000000000000..4d2835ab4858 + reg = <0 0x1a140000 0 0x1000>; + }; +... -diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie.txt b/Documentation/devicetree/bindings/pci/mediatek-pcie.txt -index 7468d666763a..ddae110d4379 100644 --- a/Documentation/devicetree/bindings/pci/mediatek-pcie.txt +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie.txt @@ -8,7 +8,7 @@ Required properties: diff --git a/target/linux/mediatek/patches-5.4/0992-PCI-mediatek-Use-regmap-to-get-shared-pcie-cfg-base.patch b/target/linux/mediatek/patches-5.4/0992-PCI-mediatek-Use-regmap-to-get-shared-pcie-cfg-base.patch index e773e2e676..3e4d44f59e 100755..100644 --- a/target/linux/mediatek/patches-5.4/0992-PCI-mediatek-Use-regmap-to-get-shared-pcie-cfg-base.patch +++ b/target/linux/mediatek/patches-5.4/0992-PCI-mediatek-Use-regmap-to-get-shared-pcie-cfg-base.patch @@ -132,8 +132,6 @@ Signed-off-by: chuanjia.liu <Chuanjia.Liu@mediatek.com> drivers/pci/controller/pcie-mediatek.c | 25 ++++++++++++++++++------- 1 file changed, 18 insertions(+), 7 deletions(-) -diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c -index cb982891b22b..2268d6073eb6 100644 --- a/drivers/pci/controller/pcie-mediatek.c +++ b/drivers/pci/controller/pcie-mediatek.c @@ -14,6 +14,7 @@ @@ -167,8 +165,8 @@ index cb982891b22b..2268d6073eb6 100644 + struct regmap *cfg; struct clk *free_ck; - struct list_head ports; -@@ -650,7 +654,7 @@ static int mtk_pcie_setup_irq(struct mtk_pcie_port *port, + struct resource mem; +@@ -651,7 +655,7 @@ static int mtk_pcie_setup_irq(struct mtk return err; } @@ -177,9 +175,9 @@ index cb982891b22b..2268d6073eb6 100644 irq_set_chained_handler_and_data(port->irq, mtk_pcie_intr_handler, port); -@@ -673,12 +677,11 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port) - if (!mem) - return -EINVAL; +@@ -666,12 +670,11 @@ static int mtk_pcie_startup_port_v2(stru + u32 val; + int err; - /* MT7622 platforms need to enable LTSSM and ASPM from PCIe subsys */ - if (pcie->base) { @@ -195,7 +193,7 @@ index cb982891b22b..2268d6073eb6 100644 } /* Assert all reset signals */ -@@ -984,6 +987,7 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie) +@@ -977,6 +980,7 @@ static int mtk_pcie_subsys_powerup(struc struct device *dev = pcie->dev; struct platform_device *pdev = to_platform_device(dev); struct resource *regs; @@ -203,7 +201,7 @@ index cb982891b22b..2268d6073eb6 100644 int err; /* get shared registers, which are optional */ -@@ -996,6 +1000,13 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie) +@@ -989,6 +993,13 @@ static int mtk_pcie_subsys_powerup(struc } } diff --git a/target/linux/mediatek/patches-5.4/0993-arm64-dts-mediatek-Split-PCIe-node-for-MT2712-MT7622.patch b/target/linux/mediatek/patches-5.4/0993-arm64-dts-mediatek-Split-PCIe-node-for-MT2712-MT7622.patch index 7d3c55c0e4..48713ecc64 100755..100644 --- a/target/linux/mediatek/patches-5.4/0993-arm64-dts-mediatek-Split-PCIe-node-for-MT2712-MT7622.patch +++ b/target/linux/mediatek/patches-5.4/0993-arm64-dts-mediatek-Split-PCIe-node-for-MT2712-MT7622.patch @@ -144,11 +144,9 @@ Signed-off-by: chuanjia.liu <Chuanjia.Liu@mediatek.com> arch/arm64/boot/dts/mediatek/mt7622.dtsi | 68 +++++++++++------ 4 files changed, 96 insertions(+), 69 deletions(-) -diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi -index 2cd8b33886e5..ab27ff4a869e 100644 --- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi -@@ -797,60 +797,73 @@ +@@ -791,60 +791,73 @@ }; }; @@ -253,11 +251,9 @@ index 2cd8b33886e5..ab27ff4a869e 100644 interrupt-controller; #address-cells = <0>; #interrupt-cells = <1>; -diff --git a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts -index 83e10591e0e5..7574d88cc46a 100644 --- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts +++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts -@@ -207,18 +207,16 @@ +@@ -294,18 +294,16 @@ }; }; @@ -283,11 +279,9 @@ index 83e10591e0e5..7574d88cc46a 100644 }; &pio { -diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi -index 339dc9f88f43..d5131c8b6a79 100644 --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi -@@ -766,45 +766,41 @@ +@@ -790,45 +790,41 @@ #reset-cells = <1>; }; @@ -350,7 +344,7 @@ index 339dc9f88f43..d5131c8b6a79 100644 interrupt-map-mask = <0 0 0 7>; interrupt-map = <0 0 0 1 &pcie_intc0 0>, <0 0 0 2 &pcie_intc0 1>, -@@ -816,15 +812,39 @@ +@@ -840,15 +836,39 @@ #interrupt-cells = <1>; }; }; @@ -393,8 +387,8 @@ index 339dc9f88f43..d5131c8b6a79 100644 interrupt-map-mask = <0 0 0 7>; interrupt-map = <0 0 0 1 &pcie_intc1 0>, <0 0 0 2 &pcie_intc1 1>, ---- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts 2020-06-15 18:52:25.092948824 +0800 -+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts 2020-06-15 18:52:15.909094229 +0800 +--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts ++++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts @@ -244,18 +244,16 @@ }; }; diff --git a/target/linux/mediatek/patches-5.4/0994-ARM-dts-mediatek-Update-mt7629-PCIe-node.patch b/target/linux/mediatek/patches-5.4/0994-ARM-dts-mediatek-Update-mt7629-PCIe-node.patch index 4ba99d89d0..b20e1fce6c 100755..100644 --- a/target/linux/mediatek/patches-5.4/0994-ARM-dts-mediatek-Update-mt7629-PCIe-node.patch +++ b/target/linux/mediatek/patches-5.4/0994-ARM-dts-mediatek-Update-mt7629-PCIe-node.patch @@ -133,11 +133,9 @@ Signed-off-by: chuanjia.liu <Chuanjia.Liu@mediatek.com> arch/arm/boot/dts/mt7629.dtsi | 23 +++++++++++++---------- 2 files changed, 15 insertions(+), 11 deletions(-) -diff --git a/arch/arm/boot/dts/mt7629-rfb.dts b/arch/arm/boot/dts/mt7629-rfb.dts -index 9980c10c6e29..eb536cbebd9b 100644 --- a/arch/arm/boot/dts/mt7629-rfb.dts +++ b/arch/arm/boot/dts/mt7629-rfb.dts -@@ -140,9 +140,10 @@ +@@ -171,9 +171,10 @@ }; }; @@ -149,11 +147,9 @@ index 9980c10c6e29..eb536cbebd9b 100644 }; &pciephy1 { -diff --git a/arch/arm/boot/dts/mt7629.dtsi b/arch/arm/boot/dts/mt7629.dtsi -index 5cbb3d244c75..94567307b842 100644 --- a/arch/arm/boot/dts/mt7629.dtsi +++ b/arch/arm/boot/dts/mt7629.dtsi -@@ -360,16 +360,21 @@ +@@ -368,16 +368,21 @@ #reset-cells = <1>; }; @@ -181,7 +177,7 @@ index 5cbb3d244c75..94567307b842 100644 clocks = <&pciesys CLK_PCIE_P1_MAC_EN>, <&pciesys CLK_PCIE_P0_AHB_EN>, <&pciesys CLK_PCIE_P1_AUX_EN>, -@@ -390,21 +395,19 @@ +@@ -398,21 +403,19 @@ power-domains = <&scpsys MT7622_POWER_DOMAIN_HIF0>; bus-range = <0x00 0xff>; ranges = <0x82000000 0 0x20000000 0x20000000 0 0x10000000>; |