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authorStijn Tintel <stijn@linux-ipv6.be>2021-08-07 02:41:11 +0300
committerStijn Tintel <stijn@linux-ipv6.be>2021-12-21 21:37:46 +0200
commit3fda16078b9979be836df0d156ca0dc0a0778f91 (patch)
tree8a91413adcd9a24e16fbfc0cfadede97d38916d2 /target/linux/qoriq/files/arch
parent080a769b4da8dfad8485d82ff94f5e844e561696 (diff)
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qoriq: add support for WatchGuard Firebox M300
This device is based on NXP's QorIQ T2081QDS board, with a quad-core dual-threaded 1.5 GHz ppc64 CPU and 4GB ECC RAM. The board has 5 ethernet interfaces, of which 3 are connected to the ethernet ports on the front panel. The other 2 are internally connected to a Marvell 88E6171 switch; the other 5 ports of this switch are also connected to the ethernet ports on the front panel. Installation: write the sdcard image to an SD card. Stock U-Boot will not boot, wait for it to fail then run these commands: setenv OpenWrt_fdt image-watchguard-firebox-m300.dtb setenv OpenWrt_kernel watchguard_firebox-m300-kernel.bin setenv wgBootSysA 'setenv bootargs root=/dev/mmcblk0p2 rw rootdelay=2 console=$consoledev,$baudrate fsl_dpaa_fman.fsl_fm_max_frm=1530; ext2load mmc 0:1 $fdtaddr $OpenWrt_fdt; ext2load mmc 0:1 $loadaddr $OpenWrt_kernel; bootm $loadaddr - $fdtaddr' saveenv reset The default U-Boot boot entry will now boot OpenWrt from the SD card. Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be> Acked-by: Rui Salvaterra <rsalvaterra@gmail.com>
Diffstat (limited to 'target/linux/qoriq/files/arch')
-rw-r--r--target/linux/qoriq/files/arch/powerpc/boot/dts/fsl/watchguard-firebox-m300.dts328
1 files changed, 328 insertions, 0 deletions
diff --git a/target/linux/qoriq/files/arch/powerpc/boot/dts/fsl/watchguard-firebox-m300.dts b/target/linux/qoriq/files/arch/powerpc/boot/dts/fsl/watchguard-firebox-m300.dts
new file mode 100644
index 0000000000..54f7e06bc5
--- /dev/null
+++ b/target/linux/qoriq/files/arch/powerpc/boot/dts/fsl/watchguard-firebox-m300.dts
@@ -0,0 +1,328 @@
+// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later
+/*
+ * WatchGuard Firebox M300 Device Tree Source
+ * Based on t2081qds.dts from Linux 5.10
+ *
+ * Copyright 2013 - 2015 Freescale Semiconductor Inc.
+ * Copyright 2020 - 2021 Stijn Tintel <stijn@linux-ipv6.be>
+ */
+
+/include/ "t208xsi-pre.dtsi"
+/include/ "t208xqds.dtsi"
+
+/ {
+ model = "WatchGuard Firebox M300";
+ compatible = "watchguard,firebox-m300", "fsl,T2081QDS";
+
+ interrupt-parent = <&mpic>;
+
+ aliases {
+ /delete-property/ ethernet0;
+ /delete-property/ ethernet1;
+ /delete-property/ ethernet2;
+ /delete-property/ ethernet3;
+ /delete-property/ ethernet4;
+ /delete-property/ ethernet5;
+ /delete-property/ ethernet6;
+ /delete-property/ ethernet7;
+
+ ethernet0 = &enet7;
+ ethernet1 = &enet0;
+ ethernet2 = &enet1;
+ ethernet3 = &enet2;
+ ethernet4 = &enet3;
+ };
+};
+
+&soc {
+// Include first to make this the first interface
+/include/ "qoriq-fman3-0-10g-1.dtsi"
+};
+
+// mdio-mux under &boardctrl + its aliases removed. causes crash:
+// Oops: Machine check, sig: 7 [#1]
+
+/include/ "t2081si-post.dtsi"
+
+// add stuff below the include to make sure we override whatever is there
+
+&enet0 {
+ phy-connection-type = "sgmii";
+ phy-handle = <&phy1>;
+};
+
+&enet1 {
+ phy-connection-type = "sgmii";
+ phy-handle = <&phy2>;
+};
+
+&enet2 {
+ phy-connection-type = "rgmii";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
+
+&enet3 {
+ phy-connection-type = "rgmii";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
+
+&enet4 {
+ status = "disabled";
+};
+
+&enet5 {
+ status = "disabled";
+};
+
+&enet6 {
+ status = "disabled";
+};
+
+&enet7 {
+ phy-connection-type = "sgmii";
+ phy-handle = <&phy0>;
+};
+
+&ifc {
+ ranges = <0x00 0x00 0x0f 0xefc00000 0x400000>;
+
+ nor@0,0 {
+ reg = <0x00 0x00 0x400000>;
+
+ partition@0{
+ reg = <0x0 0x10000>;
+ label = "qoriq-rcw";
+ read-only;
+ };
+
+ partition@10000 {
+ reg = <0x10000 0x20000>;
+ label = "wg_cfg0";
+ read-only;
+ };
+
+ partition@30000 {
+ reg = <0x30000 0x10000>;
+ label = "wg_cfg1";
+ read-only;
+ };
+
+ partition@40000 {
+ reg = <0x40000 0x10000>;
+ label = "wg_mfg_data";
+ read-only;
+ };
+
+ partition@50000 {
+ reg = <0x50000 0xb0000>;
+ label = "wg_bootopt_data_and_reserved";
+ read-only;
+ };
+
+ partition@100000 {
+ reg = <0x100000 0xb0000>;
+ label = "wg_extra_reserved_1";
+ read-only;
+ };
+
+ partition@1B0000 {
+ reg = <0x1b0000 0xb0000>;
+ label = "wg_extra_reserved_2";
+ read-only;
+ };
+
+ partition@260000 {
+ reg = <0x260000 0xc0000>;
+ label = "wg_u-boot_failsafe";
+ read-only;
+ };
+
+ partition@320000 {
+ reg = <0x320000 0x10000>;
+ label = "qoriq-fman";
+ read-only;
+ };
+
+ partition@330000 {
+ reg = <0x330000 0x10000>;
+ label = "u-boot-env";
+ };
+
+ partition@340000 {
+ reg = <0x340000 0xc0000>;
+ label = "u-boot";
+ read-only;
+ };
+ };
+
+ nand@2,0 {
+ status = "disabled";
+ };
+};
+
+&mdio0 {
+ // m300 ethernet port 0
+ phy0: ethernet-phy@0 {
+ reg = <0x00>;
+ };
+
+ // m300 ethernet port 1
+ phy1: ethernet-phy@1 {
+ reg = <0x01>;
+ };
+
+ phy2: ethernet-phy@2 {
+ reg = <0x02>;
+ };
+
+ phy3: ethernet-phy@3 {
+ reg = <0x03>;
+ };
+
+ switch0: switch@10 {
+ compatible = "marvell,mv88e6085";
+ reg = <0x10>;
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ switch0phy0: switch0phy0@0 {
+ reg = <0x00>;
+ interrupt-parent = <&switch0>;
+ };
+
+ switch0phy1: switch0phy1@1 {
+ reg = <0x01>;
+ interrupt-parent = <&switch0>;
+ };
+
+ switch0phy2: switch0phy2@2 {
+ reg = <0x02>;
+ interrupt-parent = <&switch0>;
+ };
+
+ switch0phy3: switch0phy3@3 {
+ reg = <0x03>;
+ interrupt-parent = <&switch0>;
+ };
+
+ switch0phy4: switch0phy4@4 {
+ reg = <0x04>;
+ interrupt-parent = <&switch0>;
+ };
+ };
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "sweth3";
+ phy-handle = <&switch0phy0>;
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "sweth4";
+ phy-handle = <&switch0phy1>;
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "sweth5";
+ phy-handle = <&switch0phy2>;
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "sweth6";
+ phy-handle = <&switch0phy3>;
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "sweth7";
+ phy-handle = <&switch0phy4>;
+ };
+
+ // OEM bootlog suggests multiple ports are attached to switch
+ // Keep this until OEM supplies GPL sources
+ port@5 {
+ status = "disabled";
+
+ reg = "<5>";
+ label = "cpu";
+ ethernet = <&enet2>;
+ phy-mode = "rgmii-id";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
+ port@6 {
+ reg = <6>;
+ label = "cpu";
+ ethernet = <&enet3>;
+ phy-mode = "rgmii-id";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+ };
+};
+
+&soc {
+ i2c@118000 {
+ tpm@29 {
+ compatible = "tpm,tpm_i2c_atmel";
+ reg = <0x29>;
+ };
+ hwmon@2c {
+ compatible = "winbond,w83793";
+ reg = <0x2c>;
+ };
+ hwmon@2d {
+ compatible = "winbond,w83793";
+ reg = <0x2d>;
+ };
+ rtc@32 {
+ compatible = "ricoh,rs5c372a";
+ reg = <0x32>;
+ };
+ pca9547@77 {
+ status = "disabled";
+ };
+ };
+
+ spi@110000 {
+ // DTS decompiled from OEM DTB contains flash@0 but doesn't work
+ // spi-nor spi0.0: unrecognized JEDEC id bytes: ff ff ff ff ff ff
+ // disable for now
+ flash@0 {
+ status = "disabled";
+ };
+
+ flash@1 {
+ status = "disabled";
+ };
+
+ flash@2 {
+ status = "disabled";
+ };
+ };
+};