sunxi: add mmc support

 - add MMC support for sun457i
 - update kernel config to compile in MMC and ext4
 - update kernel cmdline

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>



git-svn-id: svn://svn.openwrt.org/openwrt/trunk@39189 3c298f89-4303-0410-b956-a3cf2f4a3e73

8 files changed, 595 insertions, 5 deletions

diff --git a/target/linux/sunxi/config-3.12 b/target/linux/sunxi/config-3.12
index 4a3bc4ab85..d775c5df13 100644
--- a/target/linux/sunxi/config-3.12
+++ b/target/linux/sunxi/config-3.12
@@ -72,7 +72,7 @@ CONFIG_CLKDEV_LOOKUP=y
 CONFIG_CLKSRC_MMIO=y
 CONFIG_CLKSRC_OF=y
 CONFIG_CLONE_BACKWARDS=y
-CONFIG_CMDLINE="console=ttyS0,115200 earlyprintk"
+CONFIG_CMDLINE="console=ttyS0,115200 earlyprintk rootwait root=/dev/mmcblk0p2"
 CONFIG_CMDLINE_FORCE=y
 CONFIG_COMMON_CLK=y
 CONFIG_COMPACTION=y
@@ -138,6 +138,7 @@ CONFIG_ELF_CORE=y
 CONFIG_ENABLE_MUST_CHECK=y
 # CONFIG_ENABLE_WARN_DEPRECATED is not set
 # CONFIG_EXPERT is not set
+CONFIG_EXT4_FS=y
 CONFIG_FRAME_POINTER=y
 CONFIG_FRAME_WARN=2048
 CONFIG_FREEZER=y
@@ -267,11 +268,8 @@ CONFIG_MIGRATION=y
 CONFIG_MMC=y
 CONFIG_MMC_BLOCK=y
 # CONFIG_MMC_BLOCK_BOUNCE is not set
-CONFIG_MMC_DW=y
-# CONFIG_MMC_DW_EXYNOS is not set
-# CONFIG_MMC_DW_IDMAC is not set
-CONFIG_MMC_DW_PLTFM=y
 CONFIG_MMC_UNSAFE_RESUME=y
+CONFIG_MMC_SUNXI=y
 CONFIG_MODULES_USE_ELF_REL=y
 # CONFIG_MTD is not set
 CONFIG_MULTI_IRQ_HANDLER=y
diff --git a/target/linux/sunxi/patches-3.12/180-dt-sun7i-add-mmc.patch b/target/linux/sunxi/patches-3.12/180-dt-sun7i-add-mmc.patch
new file mode 100644
index 0000000000..ee7e2f189f
--- /dev/null
+++ b/target/linux/sunxi/patches-3.12/180-dt-sun7i-add-mmc.patch
@@ -0,0 +1,142 @@
+From 665414c8e7584be7f1a30f77cf3eae177e93fd3e Mon Sep 17 00:00:00 2001
+From: Hans de Goede <hdegoede@redhat.com>
+Date: Sat, 14 Dec 2013 22:46:20 +0100
+Subject: [PATCH] ARM: dts: sun7i: Add support for mmc
+
+Signed-off-by: Hans de Goede <hdegoede@redhat.com>
+---
+ arch/arm/boot/dts/sun7i-a20-cubieboard2.dts     | 16 ++++++++++++
+ arch/arm/boot/dts/sun7i-a20-cubietruck.dts      | 16 ++++++++++++
+ arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 32 +++++++++++++++++++++++
+ arch/arm/boot/dts/sun7i-a20.dtsi                | 34 +++++++++++++++++++++++++
+ 4 files changed, 98 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
+index 5c51cb8..6aef299 100644
+--- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
++++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
+@@ -34,7 +34,23 @@
+ 			};
+ 		};
+ 
++		sdc0: sdc@01c0f000 {
++			pinctrl-names = "default";
++			pinctrl-0 = <&sdc0_pins_a>;
++			pinctrl-1 = <&mmc0_cd_pin_cubieboard2>;
++			cd-gpios = <&pio 7 1 0>; /* PH1 */
++			cd-mode = <1>;
++			status = "okay";
++		};
++
+ 		pinctrl@01c20800 {
++			mmc0_cd_pin_cubieboard2: mmc0_cd_pin@0 {
++				allwinner,pins = "PH1";
++				allwinner,function = "gpio_in";
++				allwinner,drive = <0>;
++				allwinner,pull = <0>;
++			};
++
+ 			led_pins_cubieboard2: led_pins@0 {
+ 				allwinner,pins = "PH20", "PH21";
+ 				allwinner,function = "gpio_out";
+diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
+index 8a1009d..302c785 100644
+diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
+index ead3013..f271db9 100644
+--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
++++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
+@@ -34,7 +34,39 @@
+ 			};
+ 		};
+ 
++		sdc0: sdc@01c0f000 {
++			pinctrl-names = "default";
++			pinctrl-0 = <&sdc0_pins_a>;
++			pinctrl-1 = <&mmc0_cd_pin_olinuxinom>;
++			cd-gpios = <&pio 7 1 0>; /* PH1 */
++			cd-mode = <1>;
++			status = "okay";
++		};
++
++		sdc3: sdc@01c12000 {
++			pinctrl-names = "default";
++			pinctrl-0 = <&sdc3_pins_a>;
++			pinctrl-1 = <&mmc3_cd_pin_olinuxinom>;
++			cd-gpios = <&pio 7 11 0>; /* PH11 */
++			cd-mode = <1>;
++			status = "okay";
++		};
++
+ 		pinctrl@01c20800 {
++			mmc0_cd_pin_olinuxinom: mmc0_cd_pin@0 {
++				allwinner,pins = "PH1";
++				allwinner,function = "gpio_in";
++				allwinner,drive = <0>;
++				allwinner,pull = <0>;
++			};
++
++			mmc3_cd_pin_olinuxinom: mmc3_cd_pin@0 {
++				allwinner,pins = "PH11";
++				allwinner,function = "gpio_in";
++				allwinner,drive = <0>;
++				allwinner,pull = <0>;
++			};
++
+ 			led_pins_olinuxino: led_pins@0 {
+ 				allwinner,pins = "PH2";
+ 				allwinner,function = "gpio_out";
+diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
+index 63757c5..5f9440c 100644
+--- a/arch/arm/boot/dts/sun7i-a20.dtsi
++++ b/arch/arm/boot/dts/sun7i-a20.dtsi
+@@ -303,6 +303,26 @@
+ 			#size-cells = <0>;
+ 		};
+ 
++		sdc0: sdc@01c0f000 {
++			compatible = "allwinner,sun5i-mmc";
++			reg = <0x01c0f000 0x1000>;
++			clocks = <&ahb_gates 8>, <&mmc0>;
++			clock-names = "ahb", "mod";
++			interrupts = <0 32 4>;
++			bus-width = <4>;
++			status = "disabled";
++		};
++
++		sdc3: sdc@01c12000 {
++			compatible = "allwinner,sun5i-mmc";
++			reg = <0x01c12000 0x1000>;
++			clocks = <&ahb_gates 11>, <&mmc3>;
++			clock-names = "ahb", "mod";
++			interrupts = <0 35 4>;
++			bus-width = <4>;
++			status = "disabled";
++		};
++
+ 		pio: pinctrl@01c20800 {
+ 			compatible = "allwinner,sun7i-a20-pinctrl";
+ 			reg = <0x01c20800 0x400>;
+@@ -366,6 +386,20 @@
+ 				allwinner,drive = <0>;
+ 				allwinner,pull = <0>;
+ 			};
++
++			sdc0_pins_a: sdc0@0 {
++				allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
++				allwinner,function = "mmc0";
++				allwinner,drive = <3>;
++				allwinner,pull = <1>;
++			};
++
++			sdc3_pins_a: sdc3@0 {
++				allwinner,pins = "PI4","PI5","PI6","PI7","PI8","PI9";
++				allwinner,function = "mmc3";
++				allwinner,drive = <3>;
++				allwinner,pull = <1>;
++			};
+ 		};
+ 
+ 		timer@01c20c00 {
+-- 
+1.8.5.1
+
diff --git a/target/linux/sunxi/patches-3.12/181-dt-sun4i-add-mmc.patch b/target/linux/sunxi/patches-3.12/181-dt-sun4i-add-mmc.patch
new file mode 100644
index 0000000000..cbf40aedc6
--- /dev/null
+++ b/target/linux/sunxi/patches-3.12/181-dt-sun4i-add-mmc.patch
@@ -0,0 +1,76 @@
+From 82cfcf4cf1329420180ef06b7aaec67928396112 Mon Sep 17 00:00:00 2001
+From: Hans de Goede <hdegoede@redhat.com>
+Date: Sat, 14 Dec 2013 22:45:39 +0100
+Subject: [PATCH] ARM: dts: sun4i: Add support for mmc
+
+Signed-off-by: Hans de Goede <hdegoede@redhat.com>
+---
+ arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 16 ++++++++++++++++
+ arch/arm/boot/dts/sun4i-a10.dtsi           | 16 ++++++++++++++++
+ 2 files changed, 32 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
+index 425a7db..d193937 100644
+--- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
++++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
+@@ -42,7 +42,23 @@
+			status = "okay";
+		};
+
++		sdc0: sdc@01c0f000 {
++			pinctrl-names = "default";
++			pinctrl-0 = <&sdc0_pins_a>;
++			pinctrl-1 = <&mmc0_cd_pin_cubieboard>;
++			cd-gpios = <&pio 7 1 0>; /* PH1 */
++			cd-mode = <1>;
++			status = "okay";
++		};
++
+ 		pinctrl@01c20800 {
++			mmc0_cd_pin_cubieboard: mmc0_cd_pin@0 {
++				allwinner,pins = "PH1";
++				allwinner,function = "gpio_in";
++				allwinner,drive = <0>;
++				allwinner,pull = <0>;
++			};
++
+			led_pins_cubieboard: led_pins@0 {
+				allwinner,pins = "PH20", "PH21";
+				allwinner,function = "gpio_out";
+diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
+index 4dccdb0..13bccd5 100644
+--- a/arch/arm/boot/dts/sun4i-a10.dtsi
++++ b/arch/arm/boot/dts/sun4i-a10.dtsi
+@@ -306,6 +306,15 @@
+ 			#size-cells = <0>;
+ 		};
+ 
++		sdc0: sdc@01c0f000 {
++			compatible = "allwinner,sun4i-mmc";
++			reg = <0x01c0f000 0x1000>;
++			clocks = <&ahb_gates 8>, <&mmc0>;
++			interrupts = <32>;
++			bus-width = <4>;
++			status = "disabled";
++		};
++
+ 		intc: interrupt-controller@01c20400 {
+ 			compatible = "allwinner,sun4i-ic";
+ 			reg = <0x01c20400 0x400>;
+@@ -376,6 +385,13 @@
+ 				allwinner,drive = <0>;
+ 				allwinner,pull = <0>;
+ 			};
++
++			sdc0_pins_a: sdc0@0 {
++				allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
++				allwinner,function = "mmc0";
++				allwinner,drive = <3>;
++				allwinner,pull = <1>;
++			};
+ 		};
+ 
+ 		timer@01c20c00 {
+-- 
+1.8.5.1
+
diff --git a/target/linux/sunxi/patches-3.12/182-dt-sun5i-add-mmc.patch b/target/linux/sunxi/patches-3.12/182-dt-sun5i-add-mmc.patch
new file mode 100644
index 0000000000..866382595d
--- /dev/null
+++ b/target/linux/sunxi/patches-3.12/182-dt-sun5i-add-mmc.patch
@@ -0,0 +1,204 @@
+From 36e4afca857c8b57bd661135d173bdf65b348f78 Mon Sep 17 00:00:00 2001
+From: Hans de Goede <hdegoede@redhat.com>
+Date: Sat, 14 Dec 2013 16:20:55 +0100
+Subject: [PATCH] ARM: dts: sun5i: Add mmc support
+
+Signed-off-by: Hans de Goede <hdegoede@redhat.com>
+---
+ arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 32 ++++++++++++++++++++++
+ arch/arm/boot/dts/sun5i-a10s.dtsi                | 34 ++++++++++++++++++++++++
+ arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts  | 16 +++++++++++
+ arch/arm/boot/dts/sun5i-a13-olinuxino.dts        | 16 +++++++++++
+ arch/arm/boot/dts/sun5i-a13.dtsi                 | 17 ++++++++++++
+ 5 files changed, 115 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
+index 3c9f8b3..e53fb12 100644
+--- a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
++++ b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
+@@ -34,7 +34,39 @@
+ 			};
+ 		};
+ 
++		sdc0: sdc@01c0f000 {
++			pinctrl-names = "default";
++			pinctrl-0 = <&sdc0_pins_a>;
++			pinctrl-1 = <&mmc0_cd_pin_olinuxino_micro>;
++			cd-gpios = <&pio 6 1 0>; /* PG1 */
++			cd-mode = <1>;
++			status = "okay";
++		};
++
++		sdc1: sdc@01c10000 {
++			pinctrl-names = "default";
++			pinctrl-0 = <&sdc1_pins_a>;
++			pinctrl-1 = <&mmc1_cd_pin_olinuxino_micro>;
++			cd-gpios = <&pio 6 13 0>; /* PG13 */
++			cd-mode = <1>;
++			status = "okay";
++		};
++
+ 		pinctrl@01c20800 {
++			mmc0_cd_pin_olinuxino_micro: mmc0_cd_pin@0 {
++				allwinner,pins = "PG1";
++				allwinner,function = "gpio_in";
++				allwinner,drive = <0>;
++				allwinner,pull = <0>;
++			};
++
++			mmc1_cd_pin_olinuxino_micro: mmc1_cd_pin@0 {
++				allwinner,pins = "PG13";
++				allwinner,function = "gpio_in";
++				allwinner,drive = <0>;
++				allwinner,pull = <0>;
++			};
++
+ 			led_pins_olinuxino: led_pins@0 {
+ 				allwinner,pins = "PE3";
+ 				allwinner,function = "gpio_out";
+diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
+index 83e183c..fdbc290 100644
+--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
++++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
+@@ -274,6 +274,26 @@
+ 			#size-cells = <0>;
+ 		};
+ 
++		sdc0: sdc@01c0f000 {
++			compatible = "allwinner,sun5i-mmc";
++			reg = <0x01c0f000 0x1000>;
++			clocks = <&ahb_gates 8>, <&mmc0>;
++			clock-names = "ahb", "mod";
++			interrupts = <32>;
++			bus-width = <4>;
++			status = "disabled";
++		};
++
++		sdc1: sdc@01c10000 {
++			compatible = "allwinner,sun5i-mmc";
++			reg = <0x01c10000 0x1000>;
++			clocks = <&ahb_gates 9>, <&mmc1>;
++			clock-names = "ahb", "mod";
++			interrupts = <33>;
++			bus-width = <4>;
++			status = "disabled";
++		};
++
+ 		intc: interrupt-controller@01c20400 {
+ 			compatible = "allwinner,sun4i-ic";
+ 			reg = <0x01c20400 0x400>;
+@@ -344,6 +364,20 @@
+ 				allwinner,drive = <0>;
+ 				allwinner,pull = <0>;
+ 			};
++
++			sdc0_pins_a: sdc0@0 {
++				allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
++				allwinner,function = "mmc0";
++				allwinner,drive = <3>;
++				allwinner,pull = <1>;
++			};
++
++			sdc1_pins_a: sdc1@0 {
++				allwinner,pins = "PG3","PG4","PG5","PG6","PG7","PG8";
++				allwinner,function = "mmc1";
++				allwinner,drive = <3>;
++				allwinner,pull = <1>;
++			};
+ 		};
+ 
+ 		timer@01c20c00 {
+diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
+index fe2ce0a..fbd4e7d 100644
+--- a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
++++ b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
+@@ -20,7 +20,23 @@
+ 	compatible = "olimex,a13-olinuxino-micro", "allwinner,sun5i-a13";
+ 
+ 	soc@01c00000 {
++		sdc0: sdc@01c0f000 {
++			pinctrl-names = "default";
++			pinctrl-0 = <&sdc0_pins_a>;
++			pinctrl-1 = <&mmc0_cd_pin_olinuxinom>;
++			cd-gpios = <&pio 6 0 0>; /* PG0 */
++			cd-mode = <1>;
++			status = "okay";
++		};
++
+ 		pinctrl@01c20800 {
++			mmc0_cd_pin_olinuxinom: mmc0_cd_pin@0 {
++				allwinner,pins = "PG0";
++				allwinner,function = "gpio_in";
++				allwinner,drive = <0>;
++				allwinner,pull = <0>;
++			};
++
+ 			led_pins_olinuxinom: led_pins@0 {
+ 				allwinner,pins = "PG9";
+ 				allwinner,function = "gpio_out";
+diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
+index 9e508dc..ce22c81 100644
+--- a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
++++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
+@@ -23,7 +23,23 @@
+ 	};
+ 
+ 	soc@01c00000 {
++		sdc0: sdc@01c0f000 {
++			pinctrl-names = "default";
++			pinctrl-0 = <&sdc0_pins_a>;
++			pinctrl-1 = <&mmc0_cd_pin_olinuxino>;
++			cd-gpios = <&pio 6 0 0>; /* PG0 */
++			cd-mode = <1>;
++			status = "okay";
++		};
++
+ 		pinctrl@01c20800 {
++			mmc0_cd_pin_olinuxino: mmc0_cd_pin@0 {
++				allwinner,pins = "PG0";
++				allwinner,function = "gpio_in";
++				allwinner,drive = <0>;
++				allwinner,pull = <0>;
++			};
++
+ 			led_pins_olinuxino: led_pins@0 {
+ 				allwinner,pins = "PG9";
+ 				allwinner,function = "gpio_out";
+diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
+index 0bb4300..0ca0819 100644
+--- a/arch/arm/boot/dts/sun5i-a13.dtsi
++++ b/arch/arm/boot/dts/sun5i-a13.dtsi
+@@ -255,6 +255,16 @@
+ 		#size-cells = <1>;
+ 		ranges;
+ 
++		sdc0: sdc@01c0f000 {
++			compatible = "allwinner,sun5i-mmc";
++			reg = <0x01c0f000 0x1000>;
++			clocks = <&ahb_gates 8>, <&mmc0>;
++			clock-names = "ahb", "mod";
++			interrupts = <32>;
++			bus-width = <4>;
++			status = "disabled";
++		};
++
+ 		intc: interrupt-controller@01c20400 {
+ 			compatible = "allwinner,sun4i-ic";
+ 			reg = <0x01c20400 0x400>;
+@@ -307,6 +317,13 @@
+ 				allwinner,drive = <0>;
+ 				allwinner,pull = <0>;
+ 			};
++
++			sdc0_pins_a: sdc0@0 {
++				allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
++				allwinner,function = "mmc0";
++				allwinner,drive = <3>;
++				allwinner,pull = <1>;
++			};
+ 		};
+ 
+ 		timer@01c20c00 {
+-- 
+1.8.5.1
+
diff --git a/target/linux/sunxi/patches-3.12/183-sunxi-mmc-add-Kconfig.patch b/target/linux/sunxi/patches-3.12/183-sunxi-mmc-add-Kconfig.patch
new file mode 100644
index 0000000000..c3cb13d43d
--- /dev/null
+++ b/target/linux/sunxi/patches-3.12/183-sunxi-mmc-add-Kconfig.patch
@@ -0,0 +1,55 @@
+From 447675f817b95881e9922f002de3fc7f6d6e9207 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?David=20Lanzend=C3=B6rfer?= <david.lanzendoerfer@o2s.ch>
+Date: Fri, 6 Sep 2013 22:34:33 +0200
+Subject: [PATCH] ARM: sunxi-mci: Add driver for SD/MMC hosts found within
+ Allwinner A1X SoCs
+
+Signed-off-by: Hans de Goede <hdegoede@redhat.com>
+---
+ drivers/mmc/host/Kconfig     |    8 +
+ drivers/mmc/host/Makefile    |    2 +
+ drivers/mmc/host/sunxi-mci.c | 1056 ++++++++++++++++++++++++++++++++++++++++++
+ drivers/mmc/host/sunxi-mci.h |  334 +++++++++++++
+ 4 files changed, 1400 insertions(+)
+ create mode 100644 drivers/mmc/host/sunxi-mci.c
+ create mode 100644 drivers/mmc/host/sunxi-mci.h
+
+diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
+index 7fc5099..0df0322 100644
+--- a/drivers/mmc/host/Kconfig
++++ b/drivers/mmc/host/Kconfig
+@@ -665,3 +665,11 @@ config MMC_REALTEK_PCI
+ 	help
+ 	  Say Y here to include driver code to support SD/MMC card interface
+ 	  of Realtek PCI-E card reader
++
++config MMC_SUNXI
++	tristate "Allwinner A1X SD/MMC Host Controller support"
++	depends on ARCH_SUNXI
++	default y
++	help
++	  This selects support for the SD/MMC Host Controller on
++	  Allwinner A1X based SoCs.
+diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
+index c41d0c3..f76f783 100644
+--- a/drivers/mmc/host/Makefile
++++ b/drivers/mmc/host/Makefile
+@@ -52,6 +52,8 @@ obj-$(CONFIG_MMC_WMT)		+= wmt-sdmmc.o
+ 
+ obj-$(CONFIG_MMC_REALTEK_PCI)	+= rtsx_pci_sdmmc.o
+ 
++obj-$(CONFIG_MMC_SUNXI)		+= sunxi-mci.o
++
+ obj-$(CONFIG_MMC_SDHCI_PLTFM)		+= sdhci-pltfm.o
+ obj-$(CONFIG_MMC_SDHCI_CNS3XXX)		+= sdhci-cns3xxx.o
+ obj-$(CONFIG_MMC_SDHCI_ESDHC_IMX)	+= sdhci-esdhc-imx.o
+diff --git a/drivers/mmc/host/sunxi-mci.c b/drivers/mmc/host/sunxi-mci.c
+new file mode 100644
+index 0000000..cbde1d3
+diff --git a/drivers/mmc/host/sunxi-mci.h b/drivers/mmc/host/sunxi-mci.h
+new file mode 100644
+index 0000000..0f5f95c
+\ No newline at end of file
+-- 
+1.8.5.1
+
diff --git a/target/linux/sunxi/patches-3.12/184-sunxi-mci-use-phasectrl-from-sunxiclk.patch b/target/linux/sunxi/patches-3.12/184-sunxi-mci-use-phasectrl-from-sunxiclk.patch
new file mode 100644
index 0000000000..875ddea80a
--- /dev/null
+++ b/target/linux/sunxi/patches-3.12/184-sunxi-mci-use-phasectrl-from-sunxiclk.patch
@@ -0,0 +1,42 @@
+From 518dfd76baef66d0ef4c256fc0f72ea06d6be8cc Mon Sep 17 00:00:00 2001
+From: Hans de Goede <hdegoede@redhat.com>
+Date: Sun, 15 Dec 2013 19:44:01 +0100
+Subject: [PATCH] ARM: sunxi: clk: export clk_sunxi_mmc_phase_control
+
+Signed-off-by: Hans de Goede <hdegoede@redhat.com>
+---
+ include/linux/clk/sunxi.h | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+ create mode 100644 include/linux/clk/sunxi.h
+
+diff --git a/include/linux/clk/sunxi.h b/include/linux/clk/sunxi.h
+new file mode 100644
+index 0000000..1ef5c89
+--- /dev/null
++++ b/include/linux/clk/sunxi.h
+@@ -0,0 +1,22 @@
++/*
++ * Copyright 2013 - Hans de Goede <hdegoede@redhat.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ */
++
++#ifndef __LINUX_CLK_SUNXI_H_
++#define __LINUX_CLK_SUNXI_H_
++
++#include <linux/clk.h>
++
++void clk_sunxi_mmc_phase_control(struct clk_hw *hw, u8 sample, u8 output);
++
++#endif
+-- 
+1.8.5.1
+
diff --git a/target/linux/sunxi/patches-3.12/185-clk-sunxi-mmc-phasectrl.patch b/target/linux/sunxi/patches-3.12/185-clk-sunxi-mmc-phasectrl.patch
new file mode 100644
index 0000000000..f75394b9bd
--- /dev/null
+++ b/target/linux/sunxi/patches-3.12/185-clk-sunxi-mmc-phasectrl.patch
@@ -0,0 +1,62 @@
+From e074907f73e0bc70740901fb4a05fdf5fc81b3ff Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
+Date: Fri, 20 Sep 2013 20:29:17 -0300
+Subject: [PATCH] clk: sunxi: Implement MMC phase control
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Emilio López <emilio@elopez.com.ar>
+---
+ drivers/clk/sunxi/clk-sunxi.c | 35 +++++++++++++++++++++++++++++++++++
+ 1 file changed, 35 insertions(+)
+
+diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
+index 360d705..d2b8d3c 100644
+--- a/drivers/clk/sunxi/clk-sunxi.c
++++ b/drivers/clk/sunxi/clk-sunxi.c
+@@ -352,6 +352,41 @@ static void sun4i_get_mod0_factors(u32 *freq, u32 parent_rate,
+ 
+ 
+ /**
++ * clk_sunxi_mmc_phase_control() - configures MMC clock phase control
++ */
++
++void clk_sunxi_mmc_phase_control(struct clk_hw *hw, u8 sample, u8 output)
++{
++	#define to_clk_composite(_hw) container_of(_hw, struct clk_composite, hw)
++	#define to_clk_factors(_hw) container_of(_hw, struct clk_factors, hw)
++
++	struct clk_composite *composite = to_clk_composite(hw);
++	struct clk_hw *rate_hw = composite->rate_hw;
++	struct clk_factors *factors = to_clk_factors(rate_hw);
++	unsigned long flags = 0;
++	u32 reg;
++
++	if (factors->lock)
++		spin_lock_irqsave(factors->lock, flags);
++
++	reg = readl(factors->reg);
++
++	/* set sample clock phase control */
++	reg &= ~(0x7 << 20);
++	reg |= ((sample & 0x7) << 20);
++
++	/* set output clock phase control */
++	reg &= ~(0x7 << 8);
++	reg |= ((output & 0x7) << 8);
++
++	writel(reg, factors->reg);
++
++	if (factors->lock)
++		spin_unlock_irqrestore(factors->lock, flags);
++}
++
++
++/**
+  * sunxi_factors_clk_setup() - Setup function for factor clocks
+  */
+ 
+-- 
+1.8.5.1
+
diff --git a/target/linux/sunxi/patches-3.12/186-dt-sun4i-fixup-sdc0.patch b/target/linux/sunxi/patches-3.12/186-dt-sun4i-fixup-sdc0.patch
new file mode 100644
index 0000000000..f3aa3c3d7d
--- /dev/null
+++ b/target/linux/sunxi/patches-3.12/186-dt-sun4i-fixup-sdc0.patch
@@ -0,0 +1,11 @@
+diff -ruN old/arch/arm/boot/dts/sun4i-a10.dtsi new/arch/arm/boot/dts/sun4i-a10.dtsi
+--- old/arch/arm/boot/dts/sun4i-a10.dtsi	2014-01-04 01:59:34.000000000 +0100
++++ new/arch/arm/boot/dts/sun4i-a10.dtsi	2014-01-04 01:54:00.000000000 +0100
+@@ -323,6 +323,7 @@
+ 			compatible = "allwinner,sun4i-mmc";
+ 			reg = <0x01c0f000 0x1000>;
+ 			clocks = <&ahb_gates 8>, <&mmc0>;
++			clock-names = "ahb", "mod";
+ 			interrupts = <32>;
+ 			bus-width = <4>;
+ 			status = "disabled";