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-rw-r--r--target/linux/bcm53xx/patches-4.1/036-0006-PCI-iproc-Update-PCIe-device-tree-bindings.patch50
1 files changed, 50 insertions, 0 deletions
diff --git a/target/linux/bcm53xx/patches-4.1/036-0006-PCI-iproc-Update-PCIe-device-tree-bindings.patch b/target/linux/bcm53xx/patches-4.1/036-0006-PCI-iproc-Update-PCIe-device-tree-bindings.patch
new file mode 100644
index 0000000000..01db86c64c
--- /dev/null
+++ b/target/linux/bcm53xx/patches-4.1/036-0006-PCI-iproc-Update-PCIe-device-tree-bindings.patch
@@ -0,0 +1,50 @@
+From 8d0afa1a93be2da954c85392bbc7b2264c9d241c Mon Sep 17 00:00:00 2001
+From: Ray Jui <rjui@broadcom.com>
+Date: Tue, 15 Sep 2015 17:39:20 -0700
+Subject: [PATCH 6/7] PCI: iproc: Update PCIe device tree bindings
+
+Update the device tree bindings with added support for outbound mapping
+configurations.
+
+Signed-off-by: Ray Jui <rjui@broadcom.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+---
+ .../devicetree/bindings/pci/brcm,iproc-pcie.txt | 20 ++++++++++++++++++++
+ 1 file changed, 20 insertions(+)
+
+--- a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
++++ b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
+@@ -17,6 +17,21 @@ Optional properties:
+ - phys: phandle of the PCIe PHY device
+ - phy-names: must be "pcie-phy"
+
++- brcm,pcie-ob: Some iProc SoCs do not have the outbound address mapping done
++by the ASIC after power on reset. In this case, SW needs to configure it
++
++If the brcm,pcie-ob property is present, the following properties become
++effective:
++
++Required:
++- brcm,pcie-ob-axi-offset: The offset from the AXI address to the internal
++address used by the iProc PCIe core (not the PCIe address)
++- brcm,pcie-ob-window-size: The outbound address mapping window size (in MB)
++
++Optional:
++- brcm,pcie-ob-oarr-size: Some iProc SoCs need the OARR size bit to be set to
++increase the outbound window size
++
+ Example:
+ pcie0: pcie@18012000 {
+ compatible = "brcm,iproc-pcie";
+@@ -38,6 +53,11 @@ Example:
+
+ phys = <&phy 0 5>;
+ phy-names = "pcie-phy";
++
++ brcm,pcie-ob;
++ brcm,pcie-ob-oarr-size;
++ brcm,pcie-ob-axi-offset = <0x00000000>;
++ brcm,pcie-ob-window-size = <256>;
+ };
+
+ pcie1: pcie@18013000 {