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Diffstat (limited to 'target/linux/bmips/dts/bcm6368.dtsi')
-rw-r--r--target/linux/bmips/dts/bcm6368.dtsi93
1 files changed, 93 insertions, 0 deletions
diff --git a/target/linux/bmips/dts/bcm6368.dtsi b/target/linux/bmips/dts/bcm6368.dtsi
index 5aa2b82221..5b5064b29e 100644
--- a/target/linux/bmips/dts/bcm6368.dtsi
+++ b/target/linux/bmips/dts/bcm6368.dtsi
@@ -467,6 +467,99 @@
resets = <&periph_rst BCM6368_RST_IPSEC>;
};
+
+ ethernet: ethernet@10006800 {
+ compatible = "brcm,bcm6368-enetsw";
+ reg = <0x10006800 0x80>,
+ <0x10006a00 0x80>,
+ <0x10006c00 0x80>;
+ reg-names = "dma",
+ "dma-channels",
+ "dma-sram";
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <BCM6368_IRQ_ENETSW_RX_DMA0>,
+ <BCM6368_IRQ_ENETSW_TX_DMA0>;
+ interrupt-names = "rx",
+ "tx";
+
+ clocks = <&periph_clk BCM6368_CLK_SWPKT_USB>,
+ <&periph_clk BCM6368_CLK_SWPKT_SAR>,
+ <&periph_clk BCM6368_CLK_ROBOSW>;
+
+ resets = <&periph_rst BCM6368_RST_SWITCH>,
+ <&periph_rst BCM6368_RST_EPHY>;
+
+ dma-rx = <0>;
+ dma-tx = <1>;
+
+ status = "disabled";
+ };
+
+ switch0: switch@10f00000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6328-switch";
+ reg = <0x10f00000 0x8000>;
+ big-endian;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@8 {
+ reg = <8>;
+ label = "cpu";
+
+ phy-mode = "internal";
+ ethernet = <&ethernet>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+ };
+
+ mdio: mdio@10f000b0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6368-mdio-mux";
+ reg = <0x10f000b0 0x8>;
+
+ mdio_int: mdio@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+
+ phy2: ethernet-phy@2 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <2>;
+ };
+
+ phy3: ethernet-phy@3 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <3>;
+ };
+
+ phy4: ethernet-phy@4 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <4>;
+ };
+ };
+
+ mdio_ext: mdio@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+ };
};
pflash: nor@18000000 {