diff options
Diffstat (limited to 'target/linux/brcm2708/patches-4.1/0040-ASoC-wm8804-Implement-MCLK-configuration-options-add.patch')
| -rw-r--r-- | target/linux/brcm2708/patches-4.1/0040-ASoC-wm8804-Implement-MCLK-configuration-options-add.patch | 40 |
1 files changed, 0 insertions, 40 deletions
diff --git a/target/linux/brcm2708/patches-4.1/0040-ASoC-wm8804-Implement-MCLK-configuration-options-add.patch b/target/linux/brcm2708/patches-4.1/0040-ASoC-wm8804-Implement-MCLK-configuration-options-add.patch deleted file mode 100644 index 0eb7955940..0000000000 --- a/target/linux/brcm2708/patches-4.1/0040-ASoC-wm8804-Implement-MCLK-configuration-options-add.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 2dae96e6d244421383bca17cc71fee6d9b85ea47 Mon Sep 17 00:00:00 2001 -From: Daniel Matuschek <info@crazy-audio.com> -Date: Wed, 15 Jan 2014 21:41:23 +0100 -Subject: [PATCH 040/222] ASoC: wm8804: Implement MCLK configuration options, - add 32bit support WM8804 can run with PLL frequencies of 256xfs and 128xfs - for most sample rates. At 192kHz only 128xfs is supported. The existing - driver selects 128xfs automatically for some lower samples rates. By using an - additional mclk_div divider, it is now possible to control the behaviour. - This allows using 256xfs PLL frequency on all sample rates up to 96kHz. It - should allow lower jitter and better signal quality. The behavior has to be - controlled by the sound card driver, because some sample frequency share the - same setting. e.g. 192kHz and 96kHz use 24.576MHz master clock. The only - difference is the MCLK divider. - -This also added support for 32bit data. - -Signed-off-by: Daniel Matuschek <daniel@matuschek.net> ---- - sound/soc/codecs/wm8804.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - ---- a/sound/soc/codecs/wm8804.c -+++ b/sound/soc/codecs/wm8804.c -@@ -304,6 +304,7 @@ static int wm8804_hw_params(struct snd_p - blen = 0x1; - break; - case 24: -+ case 32: - blen = 0x2; - break; - default: -@@ -515,7 +516,7 @@ static const struct snd_soc_dai_ops wm88 - }; - - #define WM8804_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ -- SNDRV_PCM_FMTBIT_S24_LE) -+ SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE) - - #define WM8804_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ - SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \ |