1 files changed, 0 insertions, 68 deletions
diff --git a/target/linux/mediatek/patches-4.14/0159-mmc-mediatek-improve-eMMC-hs400-mode-read-performanc.patch b/target/linux/mediatek/patches-4.14/0159-mmc-mediatek-improve-eMMC-hs400-mode-read-performanc.patch
deleted file mode 100644
index 21a0c90486..0000000000
--- a/target/linux/mediatek/patches-4.14/0159-mmc-mediatek-improve-eMMC-hs400-mode-read-performanc.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 29e154716049310bb8c559f742bf2b460d5b6bbc Mon Sep 17 00:00:00 2001
-From: Chaotian Jing <chaotian.jing@mediatek.com>
-Date: Mon, 16 Oct 2017 09:46:38 +0800
-Subject: [PATCH 159/224] mmc: mediatek: improve eMMC hs400 mode read
- performance
-
-enlarge outstanding value to improve read performance
-
-Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
-Tested-by: Sean Wang <sean.wang@mediatek.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
----
- drivers/mmc/host/mtk-sd.c | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
---- a/drivers/mmc/host/mtk-sd.c
-+++ b/drivers/mmc/host/mtk-sd.c
-@@ -81,6 +81,7 @@
- #define PAD_DS_TUNE      0x188
- #define PAD_CMD_TUNE     0x18c
- #define EMMC50_CFG0      0x208
-+#define EMMC50_CFG3      0x220
- #define SDC_FIFO_CFG     0x228
- 
- /*--------------------------------------------------------------------------*/
-@@ -251,6 +252,8 @@
- #define EMMC50_CFG_CRCSTS_EDGE    (0x1 << 3)   /* RW */
- #define EMMC50_CFG_CFCSTS_SEL     (0x1 << 4)   /* RW */
- 
-+#define EMMC50_CFG3_OUTS_WR       (0x1f << 0)  /* RW */
-+
- #define SDC_FIFO_CFG_WRVALIDSEL   (0x1 << 24)  /* RW */
- #define SDC_FIFO_CFG_RDVALIDSEL   (0x1 << 25)  /* RW */
- 
-@@ -320,6 +323,7 @@ struct msdc_save_para {
- 	u32 pad_ds_tune;
- 	u32 pad_cmd_tune;
- 	u32 emmc50_cfg0;
-+	u32 emmc50_cfg3;
- 	u32 sdc_fifo_cfg;
- };
- 
-@@ -1750,6 +1754,9 @@ static int msdc_prepare_hs400_tuning(str
- 	writel(host->hs400_ds_delay, host->base + PAD_DS_TUNE);
- 	/* hs400 mode must set it to 0 */
- 	sdr_clr_bits(host->base + MSDC_PATCH_BIT2, MSDC_PATCH_BIT2_CFGCRCSTS);
-+	/* to improve read performance, set outstanding to 2 */
-+	sdr_set_field(host->base + EMMC50_CFG3, EMMC50_CFG3_OUTS_WR, 2);
-+
- 	return 0;
- }
- 
-@@ -2000,6 +2007,7 @@ static void msdc_save_reg(struct msdc_ho
- 	host->save_para.pad_ds_tune = readl(host->base + PAD_DS_TUNE);
- 	host->save_para.pad_cmd_tune = readl(host->base + PAD_CMD_TUNE);
- 	host->save_para.emmc50_cfg0 = readl(host->base + EMMC50_CFG0);
-+	host->save_para.emmc50_cfg3 = readl(host->base + EMMC50_CFG3);
- 	host->save_para.sdc_fifo_cfg = readl(host->base + SDC_FIFO_CFG);
- }
- 
-@@ -2017,6 +2025,7 @@ static void msdc_restore_reg(struct msdc
- 	writel(host->save_para.pad_ds_tune, host->base + PAD_DS_TUNE);
- 	writel(host->save_para.pad_cmd_tune, host->base + PAD_CMD_TUNE);
- 	writel(host->save_para.emmc50_cfg0, host->base + EMMC50_CFG0);
-+	writel(host->save_para.emmc50_cfg3, host->base + EMMC50_CFG3);
- 	writel(host->save_para.sdc_fifo_cfg, host->base + SDC_FIFO_CFG);
- }
-