diff options
Diffstat (limited to 'target/linux/mediatek/patches-4.14/0223-arm64-dts-mt7622-add-mmc-related-device-nodes.patch')
| -rw-r--r-- | target/linux/mediatek/patches-4.14/0223-arm64-dts-mt7622-add-mmc-related-device-nodes.patch | 200 |
1 files changed, 0 insertions, 200 deletions
diff --git a/target/linux/mediatek/patches-4.14/0223-arm64-dts-mt7622-add-mmc-related-device-nodes.patch b/target/linux/mediatek/patches-4.14/0223-arm64-dts-mt7622-add-mmc-related-device-nodes.patch deleted file mode 100644 index 7d28e2b567..0000000000 --- a/target/linux/mediatek/patches-4.14/0223-arm64-dts-mt7622-add-mmc-related-device-nodes.patch +++ /dev/null @@ -1,200 +0,0 @@ -From d41d41bfcbd8ad4bcbb1b433f7d5c3b613c58419 Mon Sep 17 00:00:00 2001 -From: Sean Wang <sean.wang@mediatek.com> -Date: Mon, 22 Jan 2018 16:58:36 +0800 -Subject: [PATCH 223/224] arm64: dts: mt7622: add mmc related device nodes - -add mmc device nodes and proper setup for used pins - -Signed-off-by: Sean Wang <sean.wang@mediatek.com> -Signed-off-by: Jimin Wang <jimin.wang@mediatek.com> ---- - arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 106 +++++++++++++++++++++++++++ - arch/arm64/boot/dts/mediatek/mt7622.dtsi | 20 +++++ - 2 files changed, 126 insertions(+) - ---- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts -+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts -@@ -8,6 +8,7 @@ - - /dts-v1/; - #include <dt-bindings/input/input.h> -+#include <dt-bindings/gpio/gpio.h> - - #include "mt7622.dtsi" - #include "mt6380.dtsi" -@@ -53,6 +54,14 @@ - reg = <0 0x40000000 0 0x3F000000>; - }; - -+ reg_1p8v: regulator-1p8v { -+ compatible = "regulator-fixed"; -+ regulator-name = "fixed-1.8V"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-always-on; -+ }; -+ - reg_3p3v: regulator-3p3v { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; -@@ -89,6 +98,23 @@ - function = "emmc", "emmc_rst"; - groups = "emmc"; - }; -+ -+ /* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7", -+ * "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4, -+ * DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively -+ */ -+ conf-cmd-dat { -+ pins = "NDL0", "NDL1", "NDL2", -+ "NDL3", "NDL4", "NDL5", -+ "NDL6", "NDL7", "NRB"; -+ input-enable; -+ bias-pull-up; -+ }; -+ -+ conf-clk { -+ pins = "NCLE"; -+ bias-pull-down; -+ }; - }; - - emmc_pins_uhs: emmc-pins-uhs { -@@ -96,6 +122,21 @@ - function = "emmc"; - groups = "emmc"; - }; -+ -+ conf-cmd-dat { -+ pins = "NDL0", "NDL1", "NDL2", -+ "NDL3", "NDL4", "NDL5", -+ "NDL6", "NDL7", "NRB"; -+ input-enable; -+ drive-strength = <4>; -+ bias-pull-up; -+ }; -+ -+ conf-clk { -+ pins = "NCLE"; -+ drive-strength = <4>; -+ bias-pull-down; -+ }; - }; - - eth_pins: eth-pins { -@@ -194,6 +235,27 @@ - function = "sd"; - groups = "sd_0"; - }; -+ -+ /* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN", -+ * "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1, -+ * DAT2, DAT3, CMD, CLK for SD respectively. -+ */ -+ conf-cmd-data { -+ pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN", -+ "I2S2_IN","I2S4_OUT"; -+ input-enable; -+ drive-strength = <8>; -+ bias-pull-up; -+ }; -+ conf-clk { -+ pins = "I2S3_OUT"; -+ drive-strength = <12>; -+ bias-pull-down; -+ }; -+ conf-cd { -+ pins = "TXD3"; -+ bias-pull-up; -+ }; - }; - - sd0_pins_uhs: sd0-pins-uhs { -@@ -201,6 +263,18 @@ - function = "sd"; - groups = "sd_0"; - }; -+ -+ conf-cmd-data { -+ pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN", -+ "I2S2_IN","I2S4_OUT"; -+ input-enable; -+ bias-pull-up; -+ }; -+ -+ conf-clk { -+ pins = "I2S3_OUT"; -+ bias-pull-down; -+ }; - }; - - /* Serial NAND is shared pin with SPI-NOR */ -@@ -311,6 +385,38 @@ - status = "okay"; - }; - -+&mmc0 { -+ pinctrl-names = "default", "state_uhs"; -+ pinctrl-0 = <&emmc_pins_default>; -+ pinctrl-1 = <&emmc_pins_uhs>; -+ status = "okay"; -+ bus-width = <8>; -+ max-frequency = <50000000>; -+ cap-mmc-highspeed; -+ mmc-hs200-1_8v; -+ vmmc-supply = <®_3p3v>; -+ vqmmc-supply = <®_1p8v>; -+ assigned-clocks = <&topckgen CLK_TOP_MSDC30_0_SEL>; -+ assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>; -+ non-removable; -+}; -+ -+&mmc1 { -+ pinctrl-names = "default", "state_uhs"; -+ pinctrl-0 = <&sd0_pins_default>; -+ pinctrl-1 = <&sd0_pins_uhs>; -+ status = "okay"; -+ bus-width = <4>; -+ max-frequency = <50000000>; -+ cap-sd-highspeed; -+ r_smpl = <1>; -+ cd-gpios = <&pio 81 GPIO_ACTIVE_LOW>; -+ vmmc-supply = <®_3p3v>; -+ vqmmc-supply = <®_3p3v>; -+ assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>; -+ assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>; -+}; -+ - &nandc { - pinctrl-names = "default"; - pinctrl-0 = <¶llel_nand_pins>; ---- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi -+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi -@@ -527,6 +527,26 @@ - status = "disabled"; - }; - -+ mmc0: mmc@11230000 { -+ compatible = "mediatek,mt7622-mmc"; -+ reg = <0 0x11230000 0 0x1000>; -+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_LOW>; -+ clocks = <&pericfg CLK_PERI_MSDC30_0_PD>, -+ <&topckgen CLK_TOP_MSDC50_0_SEL>; -+ clock-names = "source", "hclk"; -+ status = "disabled"; -+ }; -+ -+ mmc1: mmc@11240000 { -+ compatible = "mediatek,mt7622-mmc"; -+ reg = <0 0x11240000 0 0x1000>; -+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_LOW>; -+ clocks = <&pericfg CLK_PERI_MSDC30_1_PD>, -+ <&topckgen CLK_TOP_AXI_SEL>; -+ clock-names = "source", "hclk"; -+ status = "disabled"; -+ }; -+ - ssusbsys: ssusbsys@1a000000 { - compatible = "mediatek,mt7622-ssusbsys", - "syscon"; |