diff options
Diffstat (limited to 'target/linux/rockchip/patches-5.4')
11 files changed, 0 insertions, 931 deletions
diff --git a/target/linux/rockchip/patches-5.4/001-rockchip-rk3328-Add-support-for-FriendlyARM-NanoPi-R.patch b/target/linux/rockchip/patches-5.4/001-rockchip-rk3328-Add-support-for-FriendlyARM-NanoPi-R.patch deleted file mode 100644 index 69ee8a7c3a..0000000000 --- a/target/linux/rockchip/patches-5.4/001-rockchip-rk3328-Add-support-for-FriendlyARM-NanoPi-R.patch +++ /dev/null @@ -1,404 +0,0 @@ -From 0720be5371c806c1b89936984a321248fa739bea Mon Sep 17 00:00:00 2001 -From: David Bauer <mail@david-bauer.net> -Date: Fri, 10 Jul 2020 15:57:46 +0200 -Subject: [PATCH] rockchip: rk3328: Add support for FriendlyARM NanoPi R2S - -This adds support for the NanoPi R2S from FriendlyARM. - -Rockchip RK3328 SoC -1GB DDR4 RAM -Gigabit Ethernet (WAN) -Gigabit Ethernet (USB3) (LAN) -USB 2.0 Host Port -MicroSD slot -Reset button -WAN - LAN - SYS LED - -Signed-off-by: David Bauer <mail@david-bauer.net> ---- - arch/arm64/boot/dts/rockchip/Makefile | 1 + - .../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 368 ++++++++++++++++++ - 2 files changed, 369 insertions(+) - create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts - ---- a/arch/arm64/boot/dts/rockchip/Makefile -+++ b/arch/arm64/boot/dts/rockchip/Makefile -@@ -1,6 +1,7 @@ - # SPDX-License-Identifier: GPL-2.0 - dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb -+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -0,0 +1,368 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2020 David Bauer <mail@david-bauer.net> -+ */ -+ -+/dts-v1/; -+ -+#include <dt-bindings/input/input.h> -+#include <dt-bindings/gpio/gpio.h> -+#include "rk3328.dtsi" -+ -+/ { -+ model = "FriendlyElec NanoPi R2S"; -+ compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328"; -+ -+ chosen { -+ stdout-path = "serial2:1500000n8"; -+ }; -+ -+ gmac_clk: gmac-clock { -+ compatible = "fixed-clock"; -+ clock-frequency = <125000000>; -+ clock-output-names = "gmac_clk"; -+ #clock-cells = <0>; -+ }; -+ -+ keys { -+ compatible = "gpio-keys"; -+ pinctrl-0 = <&reset_button_pin>; -+ pinctrl-names = "default"; -+ -+ reset { -+ label = "reset"; -+ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; -+ linux,code = <KEY_RESTART>; -+ debounce-interval = <50>; -+ }; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; -+ pinctrl-names = "default"; -+ -+ lan_led: led-0 { -+ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; -+ label = "nanopi-r2s:green:lan"; -+ }; -+ -+ sys_led: led-1 { -+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; -+ label = "nanopi-r2s:red:sys"; -+ }; -+ -+ wan_led: led-2 { -+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; -+ label = "nanopi-r2s:green:wan"; -+ }; -+ }; -+ -+ vcc_io_sdio: sdmmcio-regulator { -+ compatible = "regulator-gpio"; -+ enable-active-high; -+ gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; -+ pinctrl-0 = <&sdio_vcc_pin>; -+ pinctrl-names = "default"; -+ regulator-name = "vcc_io_sdio"; -+ regulator-always-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-settling-time-us = <5000>; -+ regulator-type = "voltage"; -+ startup-delay-us = <2000>; -+ states = <1800000 0x1 -+ 3300000 0x0>; -+ vin-supply = <&vcc_io_33>; -+ }; -+ -+ vcc_sd: sdmmc-regulator { -+ compatible = "regulator-fixed"; -+ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; -+ pinctrl-0 = <&sdmmc0m1_gpio>; -+ pinctrl-names = "default"; -+ regulator-name = "vcc_sd"; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ vin-supply = <&vcc_io_33>; -+ }; -+ -+ vdd_5v: vdd-5v { -+ compatible = "regulator-fixed"; -+ regulator-name = "vdd_5v"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ }; -+}; -+ -+&cpu0 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&cpu1 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&cpu2 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&cpu3 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&gmac2io { -+ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; -+ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; -+ clock_in_out = "input"; -+ phy-handle = <&rtl8211e>; -+ phy-mode = "rgmii"; -+ phy-supply = <&vcc_io_33>; -+ pinctrl-0 = <&rgmiim1_pins>; -+ pinctrl-names = "default"; -+ rx_delay = <0x18>; -+ snps,aal; -+ tx_delay = <0x24>; -+ status = "okay"; -+ -+ mdio { -+ compatible = "snps,dwmac-mdio"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ rtl8211e: ethernet-phy@1 { -+ reg = <1>; -+ pinctrl-0 = <ð_phy_reset_pin>; -+ pinctrl-names = "default"; -+ reset-assert-us = <10000>; -+ reset-deassert-us = <50000>; -+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&i2c1 { -+ status = "okay"; -+ -+ rk805: pmic@18 { -+ compatible = "rockchip,rk805"; -+ reg = <0x18>; -+ interrupt-parent = <&gpio1>; -+ interrupts = <24 IRQ_TYPE_LEVEL_LOW>; -+ #clock-cells = <1>; -+ clock-output-names = "xin32k", "rk805-clkout2"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ pinctrl-0 = <&pmic_int_l>; -+ pinctrl-names = "default"; -+ rockchip,system-power-controller; -+ wakeup-source; -+ -+ vcc1-supply = <&vdd_5v>; -+ vcc2-supply = <&vdd_5v>; -+ vcc3-supply = <&vdd_5v>; -+ vcc4-supply = <&vdd_5v>; -+ vcc5-supply = <&vcc_io_33>; -+ vcc6-supply = <&vdd_5v>; -+ -+ regulators { -+ vdd_log: DCDC_REG1 { -+ regulator-name = "vdd_log"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <712500>; -+ regulator-max-microvolt = <1450000>; -+ regulator-ramp-delay = <12500>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; -+ }; -+ }; -+ -+ vdd_arm: DCDC_REG2 { -+ regulator-name = "vdd_arm"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <712500>; -+ regulator-max-microvolt = <1450000>; -+ regulator-ramp-delay = <12500>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <950000>; -+ }; -+ }; -+ -+ vcc_ddr: DCDC_REG3 { -+ regulator-name = "vcc_ddr"; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc_io_33: DCDC_REG4 { -+ regulator-name = "vcc_io_33"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vcc_18: LDO_REG1 { -+ regulator-name = "vcc_18"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc18_emmc: LDO_REG2 { -+ regulator-name = "vcc18_emmc"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vdd_10: LDO_REG3 { -+ regulator-name = "vdd_10"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1000000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; -+ }; -+ }; -+ }; -+ }; -+}; -+ -+&io_domains { -+ pmuio-supply = <&vcc_io_33>; -+ vccio1-supply = <&vcc_io_33>; -+ vccio2-supply = <&vcc18_emmc>; -+ vccio3-supply = <&vcc_io_sdio>; -+ vccio4-supply = <&vcc_18>; -+ vccio5-supply = <&vcc_io_33>; -+ vccio6-supply = <&vcc_io_33>; -+ status = "okay"; -+}; -+ -+&pinctrl { -+ button { -+ reset_button_pin: reset-button-pin { -+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ ethernet-phy { -+ eth_phy_reset_pin: eth-phy-reset-pin { -+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ }; -+ -+ leds { -+ lan_led_pin: lan-led-pin { -+ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ sys_led_pin: sys-led-pin { -+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ wan_led_pin: wan-led-pin { -+ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ pmic { -+ pmic_int_l: pmic-int-l { -+ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ sd { -+ sdio_vcc_pin: sdio-vcc-pin { -+ rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+}; -+ -+&pwm2 { -+ status = "okay"; -+}; -+ -+&sdmmc { -+ bus-width = <4>; -+ cap-sd-highspeed; -+ disable-wp; -+ pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; -+ pinctrl-names = "default"; -+ sd-uhs-sdr12; -+ sd-uhs-sdr25; -+ sd-uhs-sdr50; -+ sd-uhs-sdr104; -+ vmmc-supply = <&vcc_sd>; -+ vqmmc-supply = <&vcc_io_sdio>; -+ status = "okay"; -+}; -+ -+&tsadc { -+ rockchip,hw-tshut-mode = <0>; -+ rockchip,hw-tshut-polarity = <0>; -+ status = "okay"; -+}; -+ -+&u2phy { -+ status = "okay"; -+}; -+ -+&u2phy_host { -+ status = "okay"; -+}; -+ -+&u2phy_otg { -+ status = "okay"; -+}; -+ -+&uart2 { -+ status = "okay"; -+}; -+ -+&usb20_otg { -+ status = "okay"; -+ dr_mode = "host"; -+}; -+ -+&usb_host0_ehci { -+ status = "okay"; -+}; -+ -+&usb_host0_ohci { -+ status = "okay"; -+}; diff --git a/target/linux/rockchip/patches-5.4/004-arm64-dts-rockchip-Add-txpbl-node-for-RK3399-RK3328.patch b/target/linux/rockchip/patches-5.4/004-arm64-dts-rockchip-Add-txpbl-node-for-RK3399-RK3328.patch deleted file mode 100644 index 83ce8f1efb..0000000000 --- a/target/linux/rockchip/patches-5.4/004-arm64-dts-rockchip-Add-txpbl-node-for-RK3399-RK3328.patch +++ /dev/null @@ -1,54 +0,0 @@ -From 8a469ee35606ba65448d54e5a2a23302f7e79e3c Mon Sep 17 00:00:00 2001 -From: Carlos de Paula <me@carlosedp.com> -Date: Tue, 18 Feb 2020 17:10:37 -0500 -Subject: [PATCH] arm64: dts: rockchip: Add txpbl node for RK3399/RK3328 - -Some rockchip SoCs like the RK3399 and RK3328 exhibit an issue -where tx checksumming does not work with packets larger than 1498. - -The default Programmable Buffer Length for TX in these GMAC's is -not suitable for MTUs higher than 1498. The workaround is to disable -TX offloading with 'ethtool -K eth0 tx off rx off' causing performance -impacts as it disables hardware checksumming. - -This patch sets snps,txpbl to 0x4 which is a safe number tested ok for -the most popular MTU value of 1500. - -For reference, see https://lkml.org/lkml/2019/4/1/1382. - -Signed-off-by: Carlos de Paula <me@carlosedp.com> -Link: https://lore.kernel.org/r/20200218221040.10955-1-me@carlosedp.com -Signed-off-by: Heiko Stuebner <heiko@sntech.de> ---- - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 ++ - arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1 + - 2 files changed, 3 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -857,6 +857,7 @@ - resets = <&cru SRST_GMAC2IO_A>; - reset-names = "stmmaceth"; - rockchip,grf = <&grf>; -+ snps,txpbl = <0x4>; - status = "disabled"; - }; - -@@ -878,6 +879,7 @@ - reset-names = "stmmaceth", "mac-phy"; - phy-mode = "rmii"; - phy-handle = <&phy>; -+ snps,txpbl = <0x4>; - status = "disabled"; - - mdio { ---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -291,6 +291,7 @@ - resets = <&cru SRST_A_GMAC>; - reset-names = "stmmaceth"; - rockchip,grf = <&grf>; -+ snps,txpbl = <0x4>; - status = "disabled"; - }; - diff --git a/target/linux/rockchip/patches-5.4/005-rockchip-rk3328-add-compatible-to-NanoPi-R2S-etherne.patch b/target/linux/rockchip/patches-5.4/005-rockchip-rk3328-add-compatible-to-NanoPi-R2S-etherne.patch deleted file mode 100644 index 897a42fea2..0000000000 --- a/target/linux/rockchip/patches-5.4/005-rockchip-rk3328-add-compatible-to-NanoPi-R2S-etherne.patch +++ /dev/null @@ -1,25 +0,0 @@ -From bc6c96d850419e71dbc9b0094ccc9b668ba9be43 Mon Sep 17 00:00:00 2001 -From: David Bauer <mail@david-bauer.net> -Date: Mon, 28 Sep 2020 22:54:52 +0200 -Subject: [PATCH] rockchip: rk3328: add compatible to NanoPi R2S ethernet PHY - -This adds the compatible property to the NanoPi R2S ethernet PHY node. -Otherwise, the PHY might not be probed, as the PHY ID reads all 0xff -when it is still in reset. - -Signed-off-by: David Bauer <mail@david-bauer.net> ---- - arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -134,6 +134,8 @@ - #size-cells = <0>; - - rtl8211e: ethernet-phy@1 { -+ compatible = "ethernet-phy-id001c.c915", -+ "ethernet-phy-ieee802.3-c22"; - reg = <1>; - pinctrl-0 = <ð_phy_reset_pin>; - pinctrl-names = "default"; diff --git a/target/linux/rockchip/patches-5.4/006-rockchip-rk3328-fix-NanoPi-R2S-GMAC-clock-name.patch b/target/linux/rockchip/patches-5.4/006-rockchip-rk3328-fix-NanoPi-R2S-GMAC-clock-name.patch deleted file mode 100644 index 15c8ad71a6..0000000000 --- a/target/linux/rockchip/patches-5.4/006-rockchip-rk3328-fix-NanoPi-R2S-GMAC-clock-name.patch +++ /dev/null @@ -1,27 +0,0 @@ -From f2962ed3805c5b74948d00e4e6fbb33388261ba8 Mon Sep 17 00:00:00 2001 -From: David Bauer <mail@david-bauer.net> -Date: Sun, 4 Oct 2020 16:43:29 +0200 -Subject: [PATCH] rockchip: rk3328: fix NanoPi R2S GMAC clock name - -This commit fixes the name for the GMAC clock to gmac_clkin, as this is -the name of the clock provided by the rk3328-clk driver. - -Without this commit, the GMAC will not work in TX direction. - -Suggested-by: Tobias Waldvogel <tobias.waldvogel@gmail.com> -Signed-off-by: David Bauer <mail@david-bauer.net> ---- - arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -20,7 +20,7 @@ - gmac_clk: gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; -- clock-output-names = "gmac_clk"; -+ clock-output-names = "gmac_clkin"; - #clock-cells = <0>; - }; - diff --git a/target/linux/rockchip/patches-5.4/007-v5.13-rockchip-rk3399-Add-support-for-FriendlyARM-NanoPi-R.patch b/target/linux/rockchip/patches-5.4/007-v5.13-rockchip-rk3399-Add-support-for-FriendlyARM-NanoPi-R.patch deleted file mode 100644 index c508d71317..0000000000 --- a/target/linux/rockchip/patches-5.4/007-v5.13-rockchip-rk3399-Add-support-for-FriendlyARM-NanoPi-R.patch +++ /dev/null @@ -1,177 +0,0 @@ -From db792e9adbf85ffc9d6b0b060ac3c8e3148c8992 Mon Sep 17 00:00:00 2001 -From: Tianling Shen <cnsztl@gmail.com> -Date: Fri, 19 Mar 2021 13:16:27 +0800 -Subject: [PATCH] rockchip: rk3399: Add support for FriendlyARM NanoPi R4S - -This adds support for the NanoPi R4S from FriendlyArm. - -Rockchip RK3399 SoC -1GB DDR3 or 4GB LPDDR4 RAM -Gigabit Ethernet (WAN) -Gigabit Ethernet (PCIe) (LAN) -USB 3.0 Port x 2 -MicroSD slot -Reset button -WAN - LAN - SYS LED - -Co-developed-by: Jensen Huang <jensenhuang@friendlyarm.com> -Signed-off-by: Jensen Huang <jensenhuang@friendlyarm.com> -[minor adjustments] -Co-developed-by: Marty Jones <mj8263788@gmail.com> -Signed-off-by: Marty Jones <mj8263788@gmail.com> -[further adjustments, fixed format issues] -Signed-off-by: Tianling Shen <cnsztl@gmail.com> -Link: https://lore.kernel.org/r/20210319051627.814-2-cnsztl@gmail.com -Signed-off-by: Heiko Stuebner <heiko@sntech.de> ---- - arch/arm64/boot/dts/rockchip/Makefile | 1 + - .../boot/dts/rockchip/rk3399-nanopi-r4s.dts | 133 +++++++++++++++++++++ - 2 files changed, 134 insertions(+) - create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts - ---- a/arch/arm64/boot/dts/rockchip/Makefile -+++ b/arch/arm64/boot/dts/rockchip/Makefile -@@ -25,6 +25,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-le - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopc-t4.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb -+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-r4s.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts -@@ -0,0 +1,133 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * FriendlyElec NanoPC-T4 board device tree source -+ * -+ * Copyright (c) 2020 FriendlyElec Computer Tech. Co., Ltd. -+ * (http://www.friendlyarm.com) -+ * -+ * Copyright (c) 2018 Collabora Ltd. -+ * -+ * Copyright (c) 2020 Jensen Huang <jensenhuang@friendlyarm.com> -+ * Copyright (c) 2020 Marty Jones <mj8263788@gmail.com> -+ * Copyright (c) 2021 Tianling Shen <cnsztl@gmail.com> -+ */ -+ -+/dts-v1/; -+#include "rk3399-nanopi4.dtsi" -+ -+/ { -+ model = "FriendlyElec NanoPi R4S"; -+ compatible = "friendlyarm,nanopi-r4s", "rockchip,rk3399"; -+ -+ /delete-node/ display-subsystem; -+ -+ gpio-leds { -+ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; -+ -+ /delete-node/ status; -+ -+ lan_led: led-lan { -+ gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>; -+ label = "green:lan"; -+ }; -+ -+ sys_led: led-sys { -+ gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; -+ label = "red:sys"; -+ default-state = "on"; -+ }; -+ -+ wan_led: led-wan { -+ gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; -+ label = "green:wan"; -+ }; -+ }; -+ -+ gpio-keys { -+ pinctrl-0 = <&reset_button_pin>; -+ -+ /delete-node/ power; -+ -+ reset { -+ debounce-interval = <50>; -+ gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>; -+ label = "reset"; -+ linux,code = <KEY_RESTART>; -+ }; -+ }; -+ -+ vdd_5v: vdd-5v { -+ compatible = "regulator-fixed"; -+ regulator-name = "vdd_5v"; -+ regulator-always-on; -+ regulator-boot-on; -+ }; -+}; -+ -+&emmc_phy { -+ status = "disabled"; -+}; -+ -+&i2c4 { -+ status = "disabled"; -+}; -+ -+&pcie0 { -+ max-link-speed = <1>; -+ num-lanes = <1>; -+ vpcie3v3-supply = <&vcc3v3_sys>; -+}; -+ -+&pinctrl { -+ gpio-leds { -+ /delete-node/ leds-gpio; -+ -+ lan_led_pin: lan-led-pin { -+ rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ sys_led_pin: sys-led-pin { -+ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ wan_led_pin: wan-led-pin { -+ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ rockchip-key { -+ /delete-node/ power-key; -+ -+ reset_button_pin: reset-button-pin { -+ rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+}; -+ -+&sdhci { -+ status = "disabled"; -+}; -+ -+&sdio0 { -+ status = "disabled"; -+}; -+ -+&u2phy0_host { -+ phy-supply = <&vdd_5v>; -+}; -+ -+&u2phy1_host { -+ status = "disabled"; -+}; -+ -+&uart0 { -+ status = "disabled"; -+}; -+ -+&usbdrd_dwc3_0 { -+ dr_mode = "host"; -+}; -+ -+&vcc3v3_sys { -+ vin-supply = <&vcc5v0_sys>; -+}; diff --git a/target/linux/rockchip/patches-5.4/008-arm64-dts-rockchip-add-EEPROM-node-for-NanoPi-R4S.patch b/target/linux/rockchip/patches-5.4/008-arm64-dts-rockchip-add-EEPROM-node-for-NanoPi-R4S.patch deleted file mode 100644 index 792028b292..0000000000 --- a/target/linux/rockchip/patches-5.4/008-arm64-dts-rockchip-add-EEPROM-node-for-NanoPi-R4S.patch +++ /dev/null @@ -1,31 +0,0 @@ -From af20b3384e8723077cc6484160b0cf4e9be321de Mon Sep 17 00:00:00 2001 -From: Tianling Shen <cnsztl@gmail.com> -Date: Mon, 7 Jun 2021 15:45:37 +0800 -Subject: [PATCH] arm64: dts: rockchip: add EEPROM node for NanoPi R4S - -NanoPi R4S has a EEPROM attached to the 2nd I2C bus (U92), which -stores the MAC address. - -Signed-off-by: Tianling Shen <cnsztl@gmail.com> ---- - arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts | 9 +++++++++ - 1 file changed, 9 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts -@@ -68,6 +68,15 @@ - status = "disabled"; - }; - -+&i2c2 { -+ eeprom@51 { -+ compatible = "microchip,24c02", "atmel,24c02"; -+ reg = <0x51>; -+ pagesize = <16>; -+ read-only; /* This holds our MAC */ -+ }; -+}; -+ - &i2c4 { - status = "disabled"; - }; diff --git a/target/linux/rockchip/patches-5.4/100-rockchip-use-system-LED-for-OpenWrt.patch b/target/linux/rockchip/patches-5.4/100-rockchip-use-system-LED-for-OpenWrt.patch deleted file mode 100644 index 7b3b50ffd8..0000000000 --- a/target/linux/rockchip/patches-5.4/100-rockchip-use-system-LED-for-OpenWrt.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 6731d2c9039fbe1ecf21915eab3acee0a999508a Mon Sep 17 00:00:00 2001 -From: David Bauer <mail@david-bauer.net> -Date: Fri, 10 Jul 2020 21:38:20 +0200 -Subject: [PATCH] rockchip: use system LED for OpenWrt - -Use the SYS LED on the casing for showing system status. - -This patch is kept separate from the NanoPi R2S support patch, as i plan -on submitting the device support upstream. - -Signed-off-by: David Bauer <mail@david-bauer.net> ---- - arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts | 9 ++++++++- - 1 file changed, 8 insertions(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -13,6 +13,13 @@ - model = "FriendlyElec NanoPi R2S"; - compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328"; - -+ aliases { -+ led-boot = &sys_led; -+ led-failsafe = &sys_led; -+ led-running = &sys_led; -+ led-upgrade = &sys_led; -+ }; -+ - chosen { - stdout-path = "serial2:1500000n8"; - }; diff --git a/target/linux/rockchip/patches-5.4/101-dts-rockchip-add-usb3-controller-node-for-RK3328-SoCs.patch b/target/linux/rockchip/patches-5.4/101-dts-rockchip-add-usb3-controller-node-for-RK3328-SoCs.patch deleted file mode 100644 index 2635c7a676..0000000000 --- a/target/linux/rockchip/patches-5.4/101-dts-rockchip-add-usb3-controller-node-for-RK3328-SoCs.patch +++ /dev/null @@ -1,62 +0,0 @@ -From: William Wu <william.wu@rock-chips.com> - -RK3328 has one USB 3.0 OTG controller which uses DWC_USB3 -core's general architecture. It can act as static xHCI host -controller, static device controller, USB 3.0/2.0 OTG basing -on ID of USB3.0 PHY. - -Signed-off-by: William Wu <william.wu@rock-chips.com> -Signed-off-by: Leonidas P. Papadakos <papadakospan@gmail.com> - ---- - -NOTE: This binding still has issues. From the original thread: - -the rk3328 usb3-phy has an issue with detecting any plugin events -after a previous device got removed - see the inno-usb3-phy driver -in the vendor kernel. - -The current state is good-enough for enabling the USB3 attached LAN -port of the NanoPi R2S. However, it might explode depending on your -use-case. You've been warned. - ---- - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 27 ++++++++++++++++++++++++ - 1 file changed, 27 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -938,6 +938,33 @@ - status = "disabled"; - }; - -+ usbdrd3: usb@ff600000 { -+ compatible = "rockchip,rk3328-dwc3", "rockchip,rk3399-dwc3"; -+ clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>, -+ <&cru ACLK_USB3OTG>; -+ clock-names = "ref_clk", "suspend_clk", -+ "bus_clk"; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ ranges; -+ status = "disabled"; -+ -+ usbdrd_dwc3: dwc3@ff600000 { -+ compatible = "snps,dwc3"; -+ reg = <0x0 0xff600000 0x0 0x100000>; -+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; -+ dr_mode = "otg"; -+ phy_type = "utmi_wide"; -+ snps,dis_enblslpm_quirk; -+ snps,dis-u2-freeclk-exists-quirk; -+ snps,dis_u2_susphy_quirk; -+ snps,dis_u3_susphy_quirk; -+ snps,dis-del-phy-power-chg-quirk; -+ snps,dis-tx-ipgap-linecheck-quirk; -+ status = "disabled"; -+ }; -+ }; -+ - gic: interrupt-controller@ff811000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; diff --git a/target/linux/rockchip/patches-5.4/102-rockchip-enable-LAN-port-on-NanoPi-R2S.patch b/target/linux/rockchip/patches-5.4/102-rockchip-enable-LAN-port-on-NanoPi-R2S.patch deleted file mode 100644 index 243c1ac78d..0000000000 --- a/target/linux/rockchip/patches-5.4/102-rockchip-enable-LAN-port-on-NanoPi-R2S.patch +++ /dev/null @@ -1,60 +0,0 @@ -From 0fc3b9b7619c4878f73a6a7989863f0d1a3fd392 Mon Sep 17 00:00:00 2001 -From: David Bauer <mail@david-bauer.net> -Date: Fri, 10 Jul 2020 21:12:16 +0200 -Subject: [PATCH] rockchip: enabled LAN port on NanoPi R2S - -Enable the USB3 port on the FriendlyARM NanoPi R2S. -This is required for the USB3 attached LAN port to work. - -Signed-off-by: David Bauer <mail@david-bauer.net> ---- - .../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 27 +++++++++++++++++++ - 1 file changed, 27 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -44,6 +44,18 @@ - }; - }; - -+ vcc_rtl8153: vcc-rtl8153-regulator { -+ compatible = "regulator-fixed"; -+ gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&rtl8153_en_drv>; -+ regulator-always-on; -+ regulator-name = "vcc_rtl8153"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ enable-active-high; -+ }; -+ - leds { - compatible = "gpio-leds"; - pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; -@@ -269,6 +281,12 @@ - }; - }; - }; -+ -+ usb { -+ rtl8153_en_drv: rtl8153-en-drv { -+ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; - }; - - &io_domains { -@@ -375,3 +393,12 @@ - &usb_host0_ohci { - status = "okay"; - }; -+ -+&usbdrd3 { -+ status = "okay"; -+}; -+ -+&usbdrd_dwc3 { -+ dr_mode = "host"; -+ status = "okay"; -+}; diff --git a/target/linux/rockchip/patches-5.4/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch b/target/linux/rockchip/patches-5.4/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch deleted file mode 100644 index e318f3136f..0000000000 --- a/target/linux/rockchip/patches-5.4/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 2795c8b31a686bdb8338f9404d18ef7a154f0d75 Mon Sep 17 00:00:00 2001 -From: David Bauer <mail@david-bauer.net> -Date: Sun, 26 Jul 2020 13:32:59 +0200 -Subject: [PATCH] arm64: rockchip: add OF node for USB eth on NanoPi R2S - -This adds the OF node for the USB3 ethernet adapter on the FriendlyARM -NanoPi R2S. Add the correct value for the RTL8153 LED configuration -register to match the blink behavior of the other port on the device. - -Signed-off-by: David Bauer <mail@david-bauer.net> ---- - arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts | 7 +++++++ - 1 file changed, 7 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -401,4 +401,11 @@ - &usbdrd_dwc3 { - dr_mode = "host"; - status = "okay"; -+ -+ usb-eth@2 { -+ compatible = "realtek,rtl8153"; -+ reg = <2>; -+ -+ realtek,led-data = <0x87>; -+ }; - }; diff --git a/target/linux/rockchip/patches-5.4/104-rockchip-use-USB-host-by-default-on-rk3399-rock-pi-4.patch b/target/linux/rockchip/patches-5.4/104-rockchip-use-USB-host-by-default-on-rk3399-rock-pi-4.patch deleted file mode 100644 index 1abab5e2eb..0000000000 --- a/target/linux/rockchip/patches-5.4/104-rockchip-use-USB-host-by-default-on-rk3399-rock-pi-4.patch +++ /dev/null @@ -1,32 +0,0 @@ -From e12f67fe83446432ef16704c22ec23bd1dbcd094 Mon Sep 17 00:00:00 2001 -From: Vicente Bergas <vicencb@gmail.com> -Date: Tue, 1 Dec 2020 16:41:32 +0100 -Subject: arm64: dts: rockchip: use USB host by default on rk3399-rock-pi-4 - -Based on the board schematics at -https://dl.radxa.com/rockpi4/docs/hw/rockpi4/rockpi_4c_v12_sch_20200620.pdf -on page 19 there is an USB Type-A receptacle being used as an USB-OTG port. - -But the Type-A connector is not valid for OTG operation, for this reason -there is a switch to select host or device role. -This is non-compliant and error prone because switching is manual. -So, use host mode as it corresponds for a Type-A receptacle. - -Signed-off-by: Vicente Bergas <vicencb@gmail.com> -Link: https://lore.kernel.org/r/20201201154132.1286-4-vicencb@gmail.com -Signed-off-by: Heiko Stuebner <heiko@sntech.de> ---- - arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts -@@ -684,7 +684,7 @@ - - &usbdrd_dwc3_0 { - status = "okay"; -- dr_mode = "otg"; -+ dr_mode = "host"; - }; - - &usbdrd3_1 { |