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* ar71xx: Fix mikrotik NAND compile problemHauke Mehrtens2020-07-071-1/+1
| | | | | | | | | | This Fixes the folowing compile error: drivers/mtd/nand/rb91x_nand.c: In function 'rb91x_nand_remove': drivers/mtd/nand/rb91x_nand.c:445:16: error: 'rbni' undeclared (first use in this function) nand_release(&rbni->chip); Fixes: ce958dd88a7e ("kernel: Update kernel 4.14 to version 4.14.187") Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* ar71xx: Fix mikrotik NAND compile problemHauke Mehrtens2020-07-061-1/+1
| | | | | | | There is one closing bracket too much. Fixes: ce958dd88a7e ("kernel: Update kernel 4.14 to version 4.14.187") Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* kernel: Update kernel 4.14 to version 4.14.187Hauke Mehrtens2020-07-044-7/+7
| | | | | | | | | | | | Fixes: - CVE-2020-10757 The "mtd: rawnand: Pass a nand_chip object to nand_release()" commit was backported which needed some adaptations to other code. Build tested: ramips Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* ar71xx: correct button type for TL-MR3020 mode sliderDavid Bauer2020-05-311-2/+2
| | | | | | | | | | | | | | The TP-Link TL-MR3020 has a three-state mode slider which was previously integrated as a button (EV_KEY). This led to spurious activations of failsafe mode. Set the type for the button to switch (EV_SW), to avoid unintended activations of failsafe mode. Related: commit 27f3f493de06 ("gpio-button-hotplug: unify polled and interrupt code") Signed-off-by: David Bauer <mail@david-bauer.net>
* ar71xx: fix reset key for TP-Link TL-WR802N V1/V2Lech Perczak2020-05-311-2/+2
| | | | | | | | | | | | | | | | | | During porting support for this router to ath79 target it was discovered that GPIO mapping was incorrect (GPIO11 active high). Correct mapping for both V1 and V2 is GPIO12 active low. Default configuration from GPL source for V2 explicitly states this, and this was confirmed experimentally on ath79 by looking on /sys/kernel/debug/gpio. Correctness of this was also validated for V1 by cross-flashing vendor firmware for V1 on V2 hardware, in which reset button also worked. Fix it. Signed-off-by: Lech Perczak <lech.perczak@gmail.com> [slightly adjust commit title] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ar71xx: mikrotik: mach-rbspi.c remove wlan idThibaut VARÈNE2020-05-121-7/+7
| | | | | | | Following on the previous commit, this patch removes useless id argument from rbspi_wlan_init(). Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
* ar71xx: mikrotik: bypass id check in __rb_get_wlan_data()Thibaut VARÈNE2020-05-121-7/+3
| | | | | | | | | | | | | | | | | | | The id parameter in __rb_get_wlan_data() was incorrectly used on the assumption that id "0" would always be tied to ath9k with RLE encoding and positive id (in fact, only id "1" was valid) would always be tied to ("external") ath10k with LZO encoding. Newer hardware revisions of supported devices prove this assumption to be invalid, with ath9k caldata being now wrapped in MAGIC_ERD and LZO compressed, so disable this check to allow newer hardware to correctly decode caldata for ath9k. Since ath10k caldata is no longer pulled from this implementation, this commit also disables the publication in sysfs to avoid wasting memory. Note: this patch assumes that ath9k caldata is never stored with the new "LZOR" encoding scheme found on some ath10k devices. Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
* ar71xx: Fix gigabit switch support for Mikrotik RB951G-2HnDBaptiste Jonglez2020-03-281-0/+2
| | | | | | | | | | | | | | | | | | | | Without this patch, when using rev 3 of the Atheros AR9344 SoC, the gigabit switch (AR8327) does not work or works very erratically. This is a re-spin of http://patchwork.ozlabs.org/patch/419857/ with a different PLL value, according to the feedback from several users (including myself) as shown here: https://openwrt.org/toh/mikrotik/rb2011uias#tracking_reported_experience_with_suggested_patch_for_the_5_gige_ports Performance is acceptable: testing L3 forwarding without NAT yields a performance of 370 Mbit/s (iperf3 TCP) and 41 Kpps (iperf3 UDP with 64 bytes payload). Both tests show that 100% of CPU time is spent on softirq. A similar fix for a different device (RB2011) was added in e457d22261 ("Make GBit switch work on RB2011"). Signed-off-by: Baptiste Jonglez <git@bitsofnetworks.org>
* ar71xx: fix swapped LAN/WAN MAC address for Archer C60 v1/v2Adrian Schmutzler2020-03-111-4/+4
| | | | | | | | | | | | | | | | | | | The MAC addresses for lan/wan are swapped compared to the vendor firmware. This adjusts to vendor configuration, which is: lan *:7b label wan *:7c label+1 2.4g *:7b label 5g *:7a label-1 Only one address is stored in <&mac 0x8>, corresponding to the label. This has been checked on revisions v1, v2 and v3. Since ar71xx calculates the ath10k MAC address based on the ethernet addresses, the number there is adjusted, too. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ar71xx/ath79: ew-dorin, fix the trigger level for WPS buttonCatrinel Catrinescu2020-03-111-1/+1
| | | | | | | | | Because the WPS button had the wrong trigger level, the failsafe mode was triggered quite often, after this commit: https://git.openwrt.org/?p=openwrt/openwrt.git;a=commit;h=27f3f493de Signed-off-by: Catrinel Catrinescu <cc@80211.de>
* ar71xx: correct AVM FRITZ Repeater 450E WPS button flagDavid Bauer2020-03-011-1/+1
| | | | | | | | | The AVM FRITZ!WLAN Repeater 450E's WPS button is not active low. Correct the active low flag to avoid unintenional activation of failsafe mode on boot. Signed-off-by: David Bauer <mail@david-bauer.net>
* ar71xx: fix MAC address setup for TL-WDR4300 boardSungbo Eo2019-12-211-1/+1
| | | | | | | | | | | | | | | | | The current ethernet MAC address setup of TL-WDR4300 board is different from the setup of stock firmware: OpenWrt: lan = label_mac -2, wan = label_mac -2 stock: lan = label_mac, wan = label_mac +1 This patch applies to all devices using TL-WDR4300 board: TL-WDR3600 v1 TL-WDR4300 v1 TL-WDR4300 v1 (IL) TL-WDR4310 v1 Mercury MW4530R v1 Signed-off-by: Sungbo Eo <mans0n@gorani.run>
* ar71xx: fix buttons for TP-Link TL-WDR4900 v2Adrian Schmutzler2019-11-191-2/+13
| | | | | | | TP-Link TL-WDR4900 v2 only has one combined WPS/Reset button, so don't set up an RFKILL for this device. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ar71xx: fix LED setup for TL-WDR4900 v2Adrian Schmutzler2019-11-191-2/+36
| | | | | | | | | | | | | | | | | In ar71xx there is only one combined mach file for Archer C5/C7 and TL-WDR4900 v2. This one uses the same LED struct for all devices, defining "green" LEDs for them. However, WDR4900 uses blue front LEDs, while only C5/C7 uses green ones. Despite, in base-files WDR4900 is actually set up with "blue" for the mentioned LEDs. Thus, this patch creates a separate LED struct for WDR4900, so the LEDs can be set up correctly. Despite, the wlan5g LED is removed as it is controlled by ath9k chip for WDR4900 (in contrast to C5/C7). Note: While front LEDs are blue, USB LEDs (on the back) are green, so colors are mixed intentionally for the WDR4900 v2. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ar71xx: fix MAC address setup for TL-WDR4900 v2Adrian Schmutzler2019-11-171-3/+6
| | | | | | | | | | | | The MAC address setup of the TL-WDR4900 v2 is different from the C5/C7. This aligns ar71xx with the setup in ath79: wlan0 (5GHz) : -2 wlan1 (2.4GHz) : -1 eth1 (LAN) : 0 eth0 (WAN) : 1 Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ar71xx: fix MAC addresses for Archer C5 v1, C7 v1/v2, WDR4900 v2Adrian Schmutzler2019-11-131-2/+1
| | | | | | | | | | | | | | | | | | | As discussed in 1d18a14a90c7 ("ath79: really fix TP-Link Archer C7 v2 MAC address"), stock firmware MAC address assignment is actually as follows: wlan0 (5GHz) : -1 wlan1 (2.4GHz) : 0 eth1 (LAN) : 0 eth0 (WAN) : 1 This has never been fixed for ar71xx, so let's do it now. Note that with WDR4900 v2 even both wlan0 and wlan1 where assigned to basemac-1 before ... Fixes: FS#408 Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ar71xx: improve support for TP-Link CPE510 v2Adrian Schmutzler2019-10-212-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes commit bae927c551fd ("ar71xx: add support for TP-LINK CPE510 V2.0") where the support for this device wasn't optimal. Device support for the CPE510v2 so far has been a hack to enable flashing with CPE510v1 images. Those even have different hardware (e.g. additional ethernet port). With this patch, we provide proper support for this device in ar71xx. Installation: - Flash factory image through stock firmware WEB UI or through TFTP - To get to TFTP recovery just hold reset button while powering on for around 4-5 seconds and release. - Rename factory image to recovery.bin - Stock TFTP server IP: 192.168.0.100 - Stock device TFTP address: 192.168.0.254 Fixes: bae927c551fd ("ar71xx: add support for TP-LINK CPE510 V2.0") Signed-off-by: Andrew Cameron <apcameron@softhome.net> [Rebased onto revert commit, changed comments in mach-cpe510.c, changed commit title and description, fixed eth0 MAC address, removed eth1 initialization] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> [squashed revert, added fixes tag] Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ar71xx: WNDR4300: use standard labels for buttonsMichal Cieslakiewicz2019-10-211-3/+3
| | | | | | | GPIO key labels have been changed to standard ones (rfkill, reset, wps). It does not affect button functionality. Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
* ar71xx: remove unnecessary execute permission bitSungbo Eo2019-10-121-0/+0
| | | | | | .c files do not need to be executable. 644 is enough. Signed-off-by: Sungbo Eo <mans0n@gorani.run>
* ar71xx: WNR2200: remove redundant GPIO for WLAN LEDMichal Cieslakiewicz2019-08-311-0/+1
| | | | | | | | | | | | | | | | | | | | | | | Without this patch, an extra entry appears for AR9287 GPIO that duplicates WLAN LED but in fact drives nothing: gpiochip1: GPIOs 502-511, ath9k-phy0: gpio-502 ( |netgear:blue:wlan ) out hi gpio-503 ( |netgear:amber:test ) out hi gpio-504 ( |netgear:green:power ) out lo gpio-505 ( |rfkill ) in hi gpio-507 ( |wps ) in hi gpio-508 ( |reset ) in hi gpio-510 ( |ath9k-phy0 ) out hi <===! The pin pointed above is default LED GPIO (8) for AR9287. For WNR2200 it is not connected anywhere - pin 0 drives blue WLAN LED instead - but initialization code is missing that information. This fix calls ap9x_pci_setup_wmac_led_pin() function at device setup, forcing WLAN LED pin to be 0 and removing redundant entry. Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
* ar71xx/ath79: ag71xx: dont fetch the same var againKoen Vandeputte2019-08-271-1/+1
| | | | | | | tx_size was just declared above and set to BIT(tx->order) Use the declaration instead, which could avoid a pointer deref Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ar71xx: ag71xx: use base address value directly from the sourceKoen Vandeputte2019-08-271-2/+2
| | | | | | This brings the code more inline with the ath79 flavour Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ar71xx: ag71xx: make use of managed dev API simplifying codeKoen Vandeputte2019-08-271-51/+34
| | | | | | | | | Backport of a4eef43a120d ("ath79: ag71xx: replace alloc_etherdev with devm_alloc_etherdev") combined with the initial changes from John Crispin. Simplifies the code a lot by using the Managed dev API. Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ar71xx: ag71xx: replace ag71xx_get_phy_if_mode_name with phy_modes()Koen Vandeputte2019-08-271-22/+1
| | | | | | Backport of f73b2d64ed56 ("ath79: ag71xx: replace ag71xx_get_phy_if_mode_name() with phy_modes()") Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ar71xx: ag71xx: pass correct device pointer to dmaKoen Vandeputte2019-08-271-7/+7
| | | | | | | | | Backport of 4eaa3626a821 ("ath79: ag71xx: pass correct device pointer to dma functions") While 4.14 does not contain the warnings, it still makes sense to use the proper pointers here. Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ar71xx/ath79: ag71xx: get ring_mask consistentKoen Vandeputte2019-08-271-1/+1
| | | | | | | | | All other instances of this identical declaration fetch the value directly from the ring_order. Also do it here. Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ar71xx: ag71xx: add missing register writesKoen Vandeputte2019-08-271-0/+5
| | | | | | These are added in ath79, but were not backported here Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ar71xx: ag71xx: init rings with GFP_KERNELKoen Vandeputte2019-08-091-1/+1
| | | | | | | ar71xx got lost during final rebase .. Fixes: b417a0c48d63 ("ar71xx/ath79: ag71xx: init rings with GFP_KERNEL") Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ar71xx/ath79: ag71xx: fix sleep in atomicKoen Vandeputte2019-08-091-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When enabling atomic-sleep-debugging options in the kernel, following splat is seen when disabling the interface (which happens on boot): [ 10.892878] eth0: link down [ 10.896788] BUG: sleeping function called from invalid context at net/core/dev.c:5563 [ 10.904730] in_atomic(): 1, irqs_disabled(): 1, pid: 425, name: ip [ 10.911004] 2 locks held by ip/425: [ 10.914539] #0: (rtnl_mutex){....}, at: [<80377474>] rtnetlink_rcv_msg+0x2d8/0x380 [ 10.922441] #1: (&(&ag->lock)->rlock){....}, at: [<80330158>] ag71xx_hw_disable+0x24/0x94 [ 10.930976] CPU: 0 PID: 425 Comm: ip Not tainted 4.14.136 #0 [ 10.936716] Stack : 805e0000 80589228 80557404 876998ec 80610000 80610000 87cdcafc 805b5327 [ 10.945233] 80551534 000001a9 8061386c 87699ccc 87cfb180 00000001 876998a0 84f70903 [ 10.953751] 00000000 00000000 80b00000 8769979c 6a7407fa 00000000 00000007 00000000 [ 10.962270] 000000b7 16d0954a 000000b6 00000000 80000000 87cb658c 87cb65b0 00000001 [ 10.970787] 8046f97c 87699ccc 87cfb180 87ff2810 00000003 802ce724 0806e098 80610000 [ 10.979306] ... [ 10.981797] Call Trace: [ 10.984287] [<8006cb0c>] show_stack+0x58/0x100 [ 10.988814] [<800aab34>] ___might_sleep+0x100/0x120 [ 10.993774] [<8035c434>] napi_disable+0x30/0xd8 [ 10.998377] [<80330198>] ag71xx_hw_disable+0x64/0x94 [ 11.003418] [<8033069c>] ag71xx_stop+0x24/0x38 [ 11.007959] [<80359e30>] __dev_close_many+0xcc/0x104 [ 11.013009] [<80362eac>] __dev_change_flags+0xc8/0x1ac [ 11.018227] [<80362fb8>] dev_change_flags+0x28/0x70 [ 11.023182] [<80376890>] do_setlink+0x31c/0x91c [ 11.027786] [<80379360>] rtnl_newlink+0x3ec/0x7f8 [ 11.032563] [<80377498>] rtnetlink_rcv_msg+0x2fc/0x380 [ 11.037799] [<8039a734>] netlink_rcv_skb+0xd4/0x178 [ 11.042754] [<80399d10>] netlink_unicast+0x168/0x250 [ 11.047796] [<8039a2d4>] netlink_sendmsg+0x3d8/0x434 [ 11.052841] [<8033f0e4>] ___sys_sendmsg+0x1dc/0x290 [ 11.057794] [<80340140>] __sys_sendmsg+0x54/0x84 [ 11.062495] [<8007212c>] syscall_common+0x34/0x58 This is caused by calling napi_disable() while holding the spinlock. Fix it by omitting the spinlock, which is not required here Extensively tested on GL-MiFi, RB-912 and RB-922 hardware Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ar71xx: wpj531: fix SIG1/RSS1 LED GPIOLeon M. George2019-08-041-1/+1
| | | | | | | | | | | | | | In commit 6c937df749c7 ("ar71xx: wpj531: fix GPIOs for LED") wrong GPIO 13 for SIG1/RSS1 LED was commited, the correct GPIO number for this LED is 12. It's listed in "Hardware Guide - wpj531 7A06 (02/07/2019)" as GPIO12/RSS1 on the LED header and same GPIO 12 is used in the vendor's SDK as well. Fixes: 6c937df749c7 ("ar71xx: wpj531: fix GPIOs for LED") Signed-off-by: Leon M. George <leon@georgemail.eu> [commit subject/message facelift] Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ar71xx: fix HiveAP 121 PLL for 1000MDavid Bauer2019-08-011-1/+1
| | | | | | | | | | | | The Aerohive HiveAP 121 has the wrong PLL value set for Gigabit speeds, leading to packet-loss. 10M and 100M work fine. This commit sets the Gigabit Ethernet PLL value to the correct value, fixing packet loss. Confirmed with iperf and floodping. Signed-off-by: David Bauer <mail@david-bauer.net>
* ar71xx: fix nand init issues on some rb2011 devicesKoen Vandeputte2019-07-311-1/+5
| | | | | | | | | | | | | | | | | | | | While flashing lots of RB2011 devices, I noticed that some of them refused to boot properly, failing over the NAND parameters. Checking in detail shows that some device seem to use another NAND flash which only support standard 2048-byte pages, without 512-byte subpage support. This commit disables usage of these small subpage completely. Advantages: - Both NAND's with(out) subpage support are working now - The nand speed increases a bit (measured roughly 1%) in typical usecases Disadvantages: - The maximum storage capacity decreases by ~0.2% as small changes can consume a full page (2048 bytes) now. Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ar71xx: Archer C7 v1 LED names and RFKILL fixesTomislav Požega2019-07-251-10/+10
| | | | | | | | | | All leds on these boards are green. v1 has RFKILL GPIO 23 for production units (it had GPIO 13 only for test phase units, and these are rather very rare to find). As for the previous attempt to fix this and revert due to WDR boards have blue leds, it was wrong: WDR board does not use common setup (false). Signed-off-by: Tomislav Požega <pozega.tomislav@gmail.com>
* ar71xx: enable SGMII fixup on Mikrotik wAP ACEtienne Champetier2019-07-161-0/+16
| | | | | | | | | | | | | | | | fixes intermittent loss of connectivity on 1Gbit port, with log message: > 803x_aneg_done: SGMII link is not ok Thanks to David Bauer for pointing me in the right direction. I just had to figure out the right bus_id, which you find in this log: > ag71xx ag71xx.1: connected to PHY at gpio-1:00 [uid=004dd074, driver=Atheros 8031 ethernet] Fixes FS#2236 Signed-off-by: Etienne Champetier <champetier.etienne@gmail.com> [Wrapped commit message - Fixed whitespace erors] Signed-off-by: David Bauer <mail@david-bauer.net>
* ar71xx: fix ath79/rb4xx IRQ initialization on kernel 4.14W. Michael Petullo2019-07-031-1/+1
| | | | | | | | | | | | Apply the same approach as in commit 3b53d6fdbc24 ("ar71xx: fix pci irq init on kernel 4.14") to fix IRQ initialization for ath79-based chipsets on rb4xx. Ref: PR#2182 Acked-by: Koen Vandeputte <koen.vandeputte@ncentric.com> Signed-off-by: W. Michael Petullo <mike@flyn.org> [commit ref fix] Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ar71xx: ag71xx: update ethtool supportPetr Štetiar2019-06-051-34/+14
| | | | | | | | | | Remove references to broken and mostly deprecated phy_ethtool_ioctl, use new {s,g}et_link_ksettings and add nway_reset which was previously handled in phy_ethtool_ioctl. Cc: John Crispin <john@phrozen.org> Ref: https://bugs.openwrt.org/index.php?do=details&task_id=1982 Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ar71xx: ag71xx: remove unused SIOCETHTOOL ioctl handlingPetr Štetiar2019-06-051-10/+0
| | | | | | | | | | | | This ioctl is currently routed through generic interface code: dev_ioctl dev_ethtool __ethtool_get_link_ksettings phy_ethtool_ioctl Cc: Felix Fietkau <nbd@nbd.name> Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ar71xx: wr940 v4/v6: correct lan interface mac addressAlexander Couzens2019-05-211-1/+1
| | | | | | | | The vendor firmware only uses two mac addresses, the mac address on the label and the label + 1. While checking multiple devices, all labels have even mac addresses. Concluding only 2 address are assigned to a device. Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
* ar71xx: ag71xx: Fix broken networking on some devices (FS#2177)Petr Štetiar2019-04-081-2/+3
| | | | | | | | | It was reported, that latest ar71xx builds have broken networking on TP-Link TL-WPA8630 and Nanostation M5 XW devices and that by reverting the offending commit, everything is back to normal. Fixes: d3506d1 ("ar71xx: ag71xx: fix compile error when enabling debug") Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ar71xx: Add support for Ubiquity Bullet M (XW)Petr Štetiar2019-04-082-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CPU: AR9342 SoC RAM: 64 MB DDR2 Flash: 8 MB NOR SPI Ports: 100 MBit (24V PoE in) WLAN: 2.4/5 GHz UART: 1 UART on PCB marked as J1 with 115200 8N1 config LEDs: Power, Ethernet, 4x RSSI LEDs (orange, red, 2x green) Buttons: Reset UART connection details .---------------------------------. | | [ETH] J1 [ANT] | o VCC o RX o TX o GND | `---------------------------------' Flashing instructions using recovery method over TFTP 1. Unplug the ethernet cable from the router. 2. Using paper clip press and hold the router's reset button. Make sure you can feel it depressed by the paper clip. Do not release the button until step 4. 3. While keeping the reset button pressed in, plug the ethernet cable back into the AP. Keep the reset button depressed until you see the device's LEDs flashing in upgrade mode (alternating LED1/LED3 and LED2/LED4), this may take up to 25 seconds. 4. You may release the reset button, now the device should be in TFTP transfer mode. 5. Set a static IP on your Computer's NIC. A static IP of 192.168.1.25/24 should work. 6. Plug the PoE injector's LAN cable directly to your computer. 7. Start tftp client and issue following commands: tftp> binary tftp> connect 192.168.1.20 tftp> put openwrt-ar71xx-generic-ubnt-bullet-m-xw-squashfs-factory.bin Tested only on Bullet M2HP. Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ar71xx: Add support for TP-Link CPE210 v3Robert Marko2019-04-022-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Looks identical to the v2. This PR adds support for a popular low-cost 2.4GHz N based AP Specifications: - SoC: Qualcomm Atheros QCA9533 (650MHz) - RAM: 64MB - Storage: 8 MB SPI NOR - Wireless: 2.4GHz N based built into SoC 2x2 - Ethernet: 1x 100/10 Mbps, integrated into SoC, 24V POE IN Installation: Flash factory image through stock firmware WEB UI or through TFTP To get to TFTP recovery just hold reset button while powering on for around 4-5 seconds and release. Rename factory image to recovery.bin Stock TFTP server IP:192.168.0.100 Stock device TFTP adress:192.168.0.254 Tested-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> Signed-off-by: Robert Marko <robimarko@gmail.com> [Rebased, adjusted for separate tplink-safeloader entry, dynamic partitioning] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ar71xx: add support for MikroTik RouterBOARD 922UAGS-5HPacDKoen Vandeputte2019-03-261-28/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the MikroTik RouterBOARD 922UAGS-5HPacD with a built-in 802.11ac High-Power radio (31dBm). See https://mikrotik.com/product/RB922UAGS-5HPacD for more info. Specifications: - SoC: Qualcomm Atheros QCA9557 (720 MHz) - RAM: 128 MB - Storage: 128 MB NAND - Wireless: external QCA9882 802.11a/ac 2x2:2 - Ethernet: 1x 1000/100/10 Mbps, integrated, via AR8031 PHY, passive PoE-in 24V - SFP: 1x host - USB: 1x 2.0 type A - PCIe: 1x Mini slot (also contains USB 2.0 for 3G/LTE modems) - SIM slot: 1x mini-SIM Working: - Board/system detection - NAND storage detection - PCIe - USB: Type A & mini PCIe - Wireless - Ethernet - LED's (excl. SFP and RSSI levels) - Reset button - Sysupgrade Not working: - SFP cage Installation: - Boot vmlinux-initramfs image via BOOTP/TFTP and then flash sysupgrade image using "sysupgrade -n" Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com> Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
* ar71xx: Add support for Mikrotik RB SXT 2nD r3Xavier Douville2019-03-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The Mikrotik RouterBOARD SXT 2nD r3 is an outdoor WiFi AP / CPE with a single 2.4 GHz radio and a 100 Mbps Ethernet port. The device similar to the SXT 2nD r2, but it has SPI NOR flash instead of NAND flash. Hardware -------- CPU: Atheros AR9344 (600 MHz) RAM: 64 MiB FLASH: 16 MiB SPI NOR W25Q128 ETH: 1x 100 Mbps Atheros AG71xx WiFi: 2T2R 802.11b/g/n (ath9k) Power: Passive PoE 8-30 V Installation instructions: 1. Boot openwrt-ar71xx-mikrotik-vmlinux-initramfs.elf using a DHCP+TFTP server. 2. Erase the "firmware" partition using the mtd command. This should no longer be required once this patch is merged. 3. Use sysupgrade to install to flash. The file openwrt-ar71xx-mikrotik-rb-nor-flash-16M-squashfs-sysupgrade.bin should be used. Signed-off-by: Xavier Douville <github@douville.org>
* ar71xx: enable QCA955x SGMII fixup on RambutanMantas Pucka2019-03-061-0/+2
| | | | | | | | | fixes intermittent loss of connectivity on 1Gbit port, with log message: 803x_aneg_done: SGMII link is not ok Signed-off-by: Mantas Pucka <mantas@8devices.com>
* ar71xx: ag71xx: fix compile error when enabling debugKoen Vandeputte2019-03-051-6/+5
| | | | | | | | | | | | | | | | | | | | | | | Starting from kernel 4.5, phy_id needs to be fetched from a different location. not doing so results in this compile error: drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c: In function 'ag71xx_phy_connect_multi': drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c:133:35: error: 'struct mdio_device' has no member named 'phy_id' ag->mii_bus->mdio_map[phy_addr]->phy_id); ^ ./include/linux/printk.h:137:18: note: in definition of macro 'no_printk' printk(fmt, ##__VA_ARGS__); \ ^~~~~~~~~~~ drivers/net/ethernet/atheros/ag71xx/ag71xx.h:72:27: note: in expansion of macro 'pr_debug' #define DBG(fmt, args...) pr_debug(fmt, ## args) ^~~~~~~~ drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c:130:3: note: in expansion of macro 'DBG' DBG("%s: PHY found at %s, uid=%08x\n", ^~~ scripts/Makefile.build:326: recipe for target 'drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.o' failed Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ar71xx: GL.iNet AR300M family: correct LED definitionsAndreas Ziegler2019-02-261-8/+1
| | | | | | | | remove USB as this is no LED but power control rename WiFi LED with correct color red (like in stock firmware) set middle LED to be used for LAN link/activity Signed-off-by: Andreas Ziegler <dev@andreas-ziegler.de>
* ar71xx: fix Arduino Yun enabling of level shifters outputsEdoardo Scaglia2019-02-081-2/+2
| | | | | | | | | | | | | | | As show in Arduino Yun schematic [1] GPIO 21 and 22 are connected to output enable pin (OE) of two NTB01xx level shifters. NTB01xx datasheets [2] [3] states that OE pin are active-high therefore we should initialize GPIO 21 (DS_GPIO_OE) and GPIO 22 (DS_GPIO_OE2) accordingly to actually enable level shifters outputs. [1] https://www.arduino.cc/en/uploads/Main/arduino-Yun-schematic.pdf [2] https://www.nxp.com/docs/en/data-sheet/NTB0102.pdf [3] https://www.nxp.com/docs/en/data-sheet/NTB0104.pdf Signed-off-by: Edoardo Scaglia <edoardo.87@gmail.com>
* ar71xx: ag71xx: preserve port mirror flags during swconfig applyMilan Krstic2019-01-221-0/+4
| | | | | | | | | | The swconfig load operation always triggers 'apply' function which in this driver currently clears port mirroring flags effectively undoing port mirroring configuration. This fix preserves port mirroring flags during apply. Signed-off-by: Milan Krstic <milan.krstic@gmail.com>
* ar71xx: Fix PowerCloud CR5000 5GHz wifi macDaniel F. Dickinson2018-12-201-3/+6
| | | | | | | | | | | | | | | | | | Without this patch PowerCloud CR5000 AR9382 PCIe 5GHz Wifi uses the mac address from eeprom instead the one specified when initializing the PCIe chip. There were two issues: 1) ap94_pci_init on the second PCIe wmac is wrong as there is only one PCIe wmac on this device (the other wmac is the AR1022/AR9342 SoC wmac). 2) Without specifying pdata->use_eeprom there is a failure to load firmware and caldata. Thanks to Christian Lamparter (@chunkeey) for the heavy lifting and help. [0] [0] <https://github.com/openwrt/openwrt/pull/1613> Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
* ar71xx: ag71xx: Replace duplicate debugging code with simple function callPetr Štetiar2018-12-171-16/+1
| | | | | | | ag71xx_dump_regs is used in code several times, and is providing same output. Signed-off-by: Petr Štetiar <ynezz@true.cz>
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