| Commit message (Collapse) | Author | Age | Files | Lines |
|---|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
With update of binutils for ARC (this is now based on upstream 2.26)
we noticed issues with loadable kernel modules.
Something like that was happening:
--------------------->8-------------------
mbcache: unknown relocation: 49
insmod: can't insert './mbcache.ko': invalid module format
--------------------->8-------------------
More details could be found in that discussion in binutils mailing list:
http://thread.gmane.org/gmane.comp.gnu.binutils/74662
As of now the simplest work-around is to disable in-kernel unwinder
for now. That will at least allow us to use modules again.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: John Crispin <john@phrozen.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Initially for ARC we were building vmlinux images because it
was both simpler and more convenient to debug Linux kernel
in runt-time via JTAG. Now when base system works quite nice
we may finally use U-Boot for loading the system image as
well. Still we keep building vmlinux images as some of our
boards are development boards and loading images with JTAG
could be at some points very beneficial.
Note for U-Boot header it's required to specify 2 values:
* loading address
* entry point (if it doesn't match loading address)
and in case of ARC entry point (EP) not only differs from
loading address but also changes from build to build due to
initramfs being placed between loading address and text section.
To accommodate that feature we have to calculate EP after
vmlinux gets built and before call to mkimage.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
|
| |
|
|
|
|
| |
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 48741
|
|
|
This patch introduces support of new boards with ARC HS38 cores.
ARC HS38 is a new generation of ARC cores which utilize ARCv2 ISA.
As with ARC770 we're addind support for 2 boards for now:
[1] Synopsys SDP board (AXS103)
This is the same base-board as in AXS101 but with
FPGA-based CPU-tile where ARCHs38 core is implemented.
[2] nSIM
Again this is the same simulation engine but configured for
new instruction set and features of new CPU.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Jo-Philipp Wich <jow@openwrt.org>
Cc: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 48740
|
