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* ath79: add support for Pisen WMM003N (Cloud Easy Power)Icenowy Zheng2018-08-143-0/+136
| | | | | | | | | | | | | | | | | | | | | Pisen WMM003N (sold under the name of Cloud Easy Power) is an AR9331-based router and power bank combo device. The device uses a stock firmware modified from OpenWRT for TP-Link TL-WR703N; however some GPIO definition is different on this device with TL-WR703N. An AXP202 PMIC (connected to a 5000mAh battery) and a SD slot are also added, and the stock Flash/RAM configuration is 8MiB/64MiB. The stock firmware is an old and heavily modified OpenWRT-based firmware, which has telnetd defaultly open, and the root password is "ifconfig" (quotation marks not included). The factory image format is not known yet, however the stock firmware ships the OpenWRT's sysupgrade command, and it can be used to install a newer firmware. Due to the lack of the access to the STM8 embedded controller, the SD slot is currently not usable (because it's muxed with the on-board USB port) and the AXP PMIC cannot be monitored. Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
* ath79: drop tl prefix for TP-Link RE450 v2Peter Lundkvist2018-08-132-2/+2
| | | | | | | | This router is called RE450 and the tl prefix was used to identify it as a TP-Link device. Drop the tl prefix since we now have tplink in dts and device name. Signed-off-by: Peter Lundkvist <peter.lundkvist@gmail.com>
* ath79: gmac: add parsers for rxd(v)- and tx(d|en)-delay for AR9344Christian Lamparter2018-08-132-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some AR9344 boards do very poorly with the default settings and need custom rxdv-delay, rxd-delay, txd-delay, txen-delay flags to perform reasonably. In this case the WD My Net Wi-Fi Range Extender can not even manage 10Mbps on a 1Gbit link: root@AR9344:~# iperf3 -s ----------------------------------------------------------- Server listening on 5201 ----------------------------------------------------------- Accepted connection from client [...] [ 5] local [...] connected to client [ ID] Interval Transfer Bitrate [ 5] 0.00-1.00 sec 1.09 MBytes 9.16 Mbits/sec [ 5] 1.00-2.00 sec 895 KBytes 7.33 Mbits/sec [ 5] 2.00-3.00 sec 762 KBytes 6.25 Mbits/sec [...] [ 5] 10.00-10.03 sec 17.0 KBytes 4.74 Mbits/sec - - - - - - - - - - - - - - - - - - - - - - - - - [ ID] Interval Transfer Bitrate [ 5] 0.00-10.03 sec 9.00 MBytes 7.52 Mbits/sec with but with the correct settings in place, it does much better: root@AR9344:~# iperf3 -s ----------------------------------------------------------- Server listening on 5201 ----------------------------------------------------------- Accepted connection from client [...] [ 5] local [...] connected to client [ ID] Interval Transfer Bitrate [ 5] 0.00-1.00 sec 23.1 MBytes 193 Mbits/sec [ 5] 1.00-2.00 sec 23.1 MBytes 194 Mbits/sec [ 5] 2.00-3.00 sec 23.2 MBytes 195 Mbits/sec [...] [ 5] 10.00-10.04 sec 710 KBytes 180 Mbits/sec - - - - - - - - - - - - - - - - - - - - - - - - - [ ID] Interval Transfer Bitrate [ 5] 0.00-10.04 sec 237 MBytes 198 Mbits/sec The tx data and enable delay bits definitions are taken from Atheros' AR9344 Data Sheet Section "8.6.1 Ethernet Configuration (ETH_CFG)" on page 153. Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ath79: add QCA956x GMAC configDavid Bauer2018-08-132-0/+18
| | | | | | This commit adds the ability to configure the GMAC of the QCA956x. Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: ar913x: fix eth pll registerChuanhong Guo2018-08-131-1/+1
| | | | | | | PLL for eth0 internal clock on ar913x is at 0x18050014 and AR913X_ETH0_PLL_SHIFT is 20 instead of 17 Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: fix speed applied to MII0/1_CTRL on ar71xx/ar913xChuanhong Guo2018-08-131-2/+2
| | | | | | Currently speed value is applied to interface mode field. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: add WNDR3700 and WNDR3700v2Hannu Nyman2018-08-134-0/+93
| | | | | | | | | | | | Add support for WNDR3700 and WNDR3700v2. They share most things with WNDR3800. Only device IDs and partition structure needs to be set. Note: WNDR3700 (v1) has no NETGEAR_HW_ID, but has also the NA version of the factory image. Signed-off-by: Hannu Nyman <hannu.nyman@iki.fi>
* ath79: create WNDR3700 series .dtsi and adjust WNDR3800Hannu Nyman2018-08-133-200/+212
| | | | | | | | | | | | | | | | | Prepare for addition of WNDR3700 and WNDR3700v2 by separating the common parts into wndr3700.dtsi and leaving just the device-specific things into wndr3800.dts The three routers are identical except * device IDs * WNDR3700 (v1) has only 8 MB flash, while others have 16 MB. Partition structure needs to be defined for each device. * (WNDR3800 has 128 MB RAM, but RAM size is not in DTS) Also separate the common parts of the image recipe. (Drop also the initramfs recipe.) Signed-off-by: Hannu Nyman <hannu.nyman@iki.fi>
* ath79: fix eth pll for ar913xChuanhong Guo2018-08-111-1/+1
| | | | | | PLL node is missing syscon in compatible string. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: add support for I-O DATA WN-AC1600DGR2INAGAKI Hiroshi2018-08-115-4/+252
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I-O DATA WN-AC1600DGR2 is a 2.4/5 GHz band 11ac router, based on Qualcomm Atheros QCA9557. Specification: - Qualcomm Atheros QCA9557 - 128 MB of RAM - 16 MB of Flash - 2.4/5 GHz wifi - 2.4 GHz: 2T2R (SoC internal) - 5 GHz: 3T3R (QCA9880) - 5x 10/100/1000 Mbps Ethernet - 6x LEDs, 6x keys (4x buttons, 1x slide switch) - UART header on PCB - Vcc, GND, TX, RX from ethernet port side - 115200n8 Flash instruction using factory image: 1. Connect the computer to the LAN port of WN-AC1600DGR2 2. Connect power cable to WN-AC1600DGR2 and turn on it 3. Access to "http://192.168.0.1/" and open firmware update page ("ファームウェア") 4. Select the OpenWrt factory image and click update ("更新") button 5. Wait ~150 seconds to complete flashing Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
* ath79: add support of D-Link DIR-825 B1Dmitry Tunin2018-08-114-0/+288
| | | | | | Add support for the ar71xx supported D-Link DIR-825 B1 to ath79. Signed-off-by: Dmitry Tunin <hanipouspilot@gmail.com>
* ath79: add ath9k calibration data MAC addresses patchingChristian Lamparter2018-08-111-0/+50
| | | | | | | | | | | | | | | | | | This patch copies over the MAC patching helper functions from lantiq's target/linux/lantiq/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom file. Not all vendors bothered to write the correct MAC addresses for the ath9k wifi into the calibration data. And while ath9k does have some special dt-properties to extract the addresses from a fixed position, there are still devices that require userspace to edit or modify the caldata. In my case, the MAC address for the Wi-Fi device is stored in an unsorted key-value based "nvram" database and there's an existing userspace tool to extract the data. Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ath79: add support for TP-Link TL-WDR4900 v2Chuanhong Guo2018-08-114-2/+245
| | | | | | | | | | | | | | Specification: - SoC: Qualcomm Atheros QCA9558 - Flash: 8 MB - RAM: 128 MB - Ethernet: AR8327N with 5 GE ports. - Wireless radio: QCA9558 for 2.4G and AR9580 for 5G. Flash instruction: Upload the generated factory firmware on web interface. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: add support for OCEDO KoalaDavid Bauer2018-08-094-0/+184
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds support for the OCEDO Koala SOC: Qualcomm QCA9558 (Scorpion) RAM: 128MB FLASH: 16MiB WLAN1: QCA9558 2.4 GHz 802.11bgn 3x3 WLAN2: QCA9880 5 GHz 802.11nac 3x3 INPUT: RESET button LED: Power, LAN, WiFi 2.4, WiFi 5, SYS Serial: Header Next to Black metal shield Pinout is 3.3V - GND - TX - RX (Arrow Pad is 3.3V) The Serial setting is 115200-8-N-1. Tested and working: - Ethernet - 2.4 GHz WiFi - 5 GHz WiFi - TFTP boot from ramdisk image - Installation via ramdisk image - OpenWRT sysupgrade - Buttons - LEDs Installation seems to be possible only through booting an OpenWRT ramdisk image. Hold down the reset button while powering on the device. It will load a ramdisk image named 'koala-uImage-initramfs-lzma.bin' from 192.168.100.8. Note: depending on the present software, the device might also try to pull a file called 'koala-uimage-factory'. Only the name differs, it is still used as a ramdisk image. Wait for the ramdisk image to boot. OpenWRT can be written to the flash via sysupgrade or mtd. Due to the flip-flop bootloader which we not (yet) support, you need to set the partition the bootloader is selecting. It is possible from the initramfs image with > fw_setenv bootcmd run bootcmd_1 Afterwards you can reboot the device. Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: ag71xx: remove PHY resetChuanhong Guo2018-08-096-22/+6
| | | | | | | | | | | | Bit 8/12 of reset controller which is marked as PHY_RESET/SWITCH_RESET in datasheets will trigger either a reset for builtin switch or assert an external ETH0_RESET_L/ETH1_RESET_L pin, which are usually connected to external PHY/switch. None of them should be triggered every time an interface is brought up in ethernet driver. Remove PHY reset support from ag71xx and definition for them in dtsi. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: add support for Buffalo BHR-4GRV2INAGAKI Hiroshi2018-08-095-0/+179
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Buffalo BHR-4GRV2 is a wired router, based on Qualcomm Atheros QCA9558. Ported from ar71xx target. Specification: - Qualcomm Atheros QCA9558 - 64 MB of RAM - 16 MB of Flash - 5x 10/100/1000 Ethernet - QCA8337N - 4x LEDs, 2x keys - UART header on PCB - Vcc, TX, RX, GND from LED side - 115200n8 Flash instruction using factory image: 1. Connect the computer to the LAN port of BHR-4GRV2 2. Connect power cable to BHR-4GRV2 and turn on it 3. Access to "http://192.168.12.1/" and open firmware update page ("ファームウェア更新") 4. Select the OpenWrt factory image and click update ("更新実行") button 5. Wait ~120 seconds to complete flashing Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
* ath79: fix PLL settings for QCA955xDavid Bauer2018-08-093-2/+10
| | | | | | | | | | | | | | This adds PLL settings for the ethernet ports of the TP-Link TL-WR1043 v2/v3 and the Openmesh OM5P-AC-v2. We also change the PLL-settings in the qca9557.dtsi to match the ones used as default on the ar71xx target. As of 4b9680f138 those devices have broken ethernet ports as the default PLL settings defined in the QCA9557.dtsi are applied which are off for those devices. Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: add pll for archer c7Kevin Darbyshire-Bryant2018-08-091-0/+2
| | | | | | | | | | | | | | | | | | commit 4b9680f fixed pll settings and the correct pll set by bootloader is overrided by value in qca9557.dtsi which is incorrect for Archer C7 and breaks ethernet. Add pll values for archer c7 to fix ethernet connection. This individual pll tweak has been cherry picked from github pr 1260 which changes a couple of things in a single commit and should be ideally split. This commit get archer v7 back and working. Tested: archer c7 v2 Original combined commit authored by: Signed-off-by: Chuanhong Guo <gch981213@gmail.com> c7 fix only split out by: Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
* ath79: fix QCA9557 eth PLL settingsDavid Bauer2018-08-081-1/+7
| | | | | | | | The QCA9557 dtsi is currently missing pll-handle and pll-regs for both eth0 and eth1, therefore PLL settings won't be applied. This commit fixes this behavior. Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: don't include tl-wdr3600 image build code for tl-wdr4300Mathias Kresin2018-08-081-1/+3
| | | | | | | | | | Including the tl-wdr3600 image build code just to overwrite most of it doesn't make much sense and only makes it hard to read. Furthermore, the tl-wdr4300 image will be marked as compatible with the tl-wdr3600 this way. Signed-off-by: Mathias Kresin <dev@kresin.me>
* ath79: cleanup netgear wnr612-v2 supported devicesMathias Kresin2018-08-081-1/+1
| | | | | | | The netgear,wnr612-v2 is included by default based on the device define. Signed-off-by: Mathias Kresin <dev@kresin.me>
* ath79: mark netgear variables as device specificMathias Kresin2018-08-081-0/+2
| | | | | | | | The variables are used in image build recipes and need to be marked as per devices vars to be stored individual per image define. Otherwise the last defined variable will be used for all boards. Signed-off-by: Mathias Kresin <dev@kresin.me>
* ath79: Fix led nodes for TL-WR740N v2 and add its clonesChuanhong Guo2018-08-0811-28/+138
| | | | | | | | | | | | | | | | This patch did the following things: 1. Separate ath9k-leds out of gpio leds so that all other leds will work before ath9k loded (e.g. during preinit/init stage). 2. Rename wps led to qss since that's how TP-Link mark it. 3. Rename LED prefix to tp-link because that dts is shared by many devices. 4. Rename to wr740n-v1 because v1 is the first and v2 just use the fw of v1. (This will require a forced sysupgrade if you comes from the previous wr740n v2 image.) 5. Remove SUPPORTED_DEVICES. (tl-wr740n-v2 doesn't exist anywhere so it's useless.) 6. Add all WR741ND v1 clones found in ar71xx. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: fix dts warningsMathias Kresin2018-08-0845-188/+90
| | | | | | | Fix all issues found by the devicetree compiler like wrong address/size cells as well as wrong/missing/superfluous unit addresses. Signed-off-by: Mathias Kresin <dev@kresin.me>
* ath79: fix node namesMathias Kresin2018-08-089-9/+9
| | | | | | Use the standardized node names from the devicetree specification. Signed-off-by: Mathias Kresin <dev@kresin.me>
* ath79: fix compatible stringsMathias Kresin2018-08-085-5/+5
| | | | | | | Use only the jedec,spi-nor compatible string. Everything else either never worked or is only support to keep compatibility. Signed-off-by: Mathias Kresin <dev@kresin.me>
* ath79: fix whitespace issue in dts filesMathias Kresin2018-08-088-24/+24
| | | | | | Fixes spaces vs. tabs issues and remove indentation on blank lines. Signed-off-by: Mathias Kresin <dev@kresin.me>
* ath79: rename tl-archer-c7 to archer-c7Chuanhong Guo2018-08-065-9/+9
| | | | | | | | This router is called Archer C7 and the tl was used to identify TP-LINK. Since we have added tplink in dts/board name, the tl prefix is useless now. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: alphabetical order image/generic.mkChuanhong Guo2018-08-061-9/+9
| | | | | | Move the wzr-hp-g450h in image/generic.mk to keep alphabetical order. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: rename dts/image using manufacturer_board schemeChuanhong Guo2018-08-0636-84/+79
| | | | | | | This helps getting rid of SUPPORTED_DEVICES which can be auto-generated in image/Makefile. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: remove quotes for boardname in scriptsChuanhong Guo2018-08-064-74/+74
| | | | | | Quotes are not required in case statements. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: put all devices in alphabetical order in scriptsChuanhong Guo2018-08-063-51/+38
| | | | | | | And remove specifying lan interfaces as eth1.1 because this is handled by ucidef_add_switch. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: fix support for TL-MR3020 v1Chuanhong Guo2018-08-062-6/+2
| | | | | | | | Change lan and it's LED to eth0 It's broken since c7c807cb8c3fd6538101de885f66d4681785defe where I changed the dts but forgot to change default configurations. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: fix support for TL-WR740N/WR741N v4Chuanhong Guo2018-08-064-5/+5
| | | | | | | | | | | 1. Swap eth0/eth1 Both devices are using AR9331, the builtin switch on AR9331 is connected to gmac1 and gmac1 is named as eth1 in ath79. PS: gmac1 is eth0 and gmac0 is eth1 in ar71xx because of the reversed initialization order. 2. Fix the incorrect compatible string in dts Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: remove useless phy-handle nodesChuanhong Guo2018-08-062-20/+1
| | | | | | | phy-handle is used to poll link status. They are useless when we need fixed-link on these interfaces. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* treewide: convert gpio-export to platform driverRené van Dorst2018-08-041-7/+4
| | | | | | | | | | | | Without this patch you will get an error "gpio-export probe deferral not supported" when you try to export i2c expander gpio pins. gpio-export is probed long before i2c-bus and i2c expander are created and it doesn't retry it so none pins are exported. Signed-off-by: René van Dorst <opensource@vdorst.com> apply the change to all instances of the gpio exports patch Signed-off-by: Mathias Kresin <dev@kresin.me>
* ath79: really fix TP-Link Archer C7 v2 MAC addressMathias Kresin2018-08-042-2/+1
| | | | | | | | | | | | | | | | | | | | Revert 290c54473ead ("ath79: fix TP-Link Archer C7 v2 wlan1 MAC address") which obviously aims to have a distinct MAC address per interface. Unfortunally it doesn't match what is used by the stock firmware and we shouldn'z use MAC Adresses not reserverd for/assigned to a particular board. The correct MAC adress increments for this board are: wlan0 (5GHz) : -1 wlan1 (2.4GHz) : 0 eth1 (LAN) : 0 eth0 (WAN) : 1 Fixes: FS#408 Signed-off-by: Mathias Kresin <dev@kresin.me>
* kernel: bump 4.14 to 4.14.60Koen Vandeputte2018-08-031-1/+1
| | | | | | | | | | | | Refreshed all patches Removed upstreamed patches: - 500-ext4-fix-check-to-prevent-initializing-reserved-inod.patch Compile-tested on: cns3xxx, imx6, x86_64 Runtime-tested on: cns3xxx, imx6, x86_64 Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ath79: Forward port support for CR3000Daniel F. Dickinson2018-08-014-3/+194
| | | | | | | | | | | | | | | | | | | | | | | | The PowerCloud Systems CR3000 was a cloud-managed CPE for a now defunct NaaS offering. It was previously supported under the ar71xx branch and this forward ports that support with some notable differences: 1) Since reverting to stock firmware is now irrelevant there is is only a single openwrt image generated which uses the entire flash rather than preserving PowerCloud-specific partitions that are unneeded to openwrt-- those partitions will be erased and used by the openwrt image. 2) Rather than use a non-standard probe order for the ethernet devices, this image uses a set of 'ip link set ethX name ethY' commands very early in preinit (before the network is used at all), in order to have the the switch and Wan use the same ethernet names as in previous images. 3) /etc/config/wireless will need to be regenerated as the path to the wireless device has changed due to differences in ath79 DT for ar93x compared to ar71xx images. 4) eth0 is wan and eth1 is lan (switch) Signed-off-by: Daniel F. Dickinson <cshored@thecshore.com>
* kernel: bump 4.14 to 4.14.59Stijn Tintel2018-07-312-32/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drop patch that was superseded upstream: ramips/0036-mtd-fix-cfi-cmdset-0002-erase-status-check.patch Drop upstreamed patches: - apm821xx/020-0001-crypto-crypto4xx-remove-bad-list_del.patch - apm821xx/020-0011-crypto-crypto4xx-fix-crypto4xx_build_pdr-crypto4xx_b.patch - ath79/0011-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch - brcm63xx/001-4.15-08-bcm63xx_enet-correct-clock-usage.patch - brcm63xx/001-4.15-09-bcm63xx_enet-do-not-write-to-random-DMA-channel-on-B.patch - generic/backport/080-net-convert-sock.sk_wmem_alloc-from-atomic_t-to-refc.patch - generic/pending/170-usb-dwc2-Fix-DMA-alignment-to-start-at-allocated-boun.patch - generic/pending/900-gen_stats-fix-netlink-stats-padding.patch In 4.14.55, a patch was introduced that breaks ext4 images in some cases. The newly introduced patch backport-4.14/500-ext4-fix-check-to-prevent-initializing-reserved-inod.patch addresses this breakage. Fixes the following CVEs: - CVE-2018-10876 - CVE-2018-10877 - CVE-2018-10879 - CVE-2018-10880 - CVE-2018-10881 - CVE-2018-10882 - CVE-2018-10883 Compile-tested: ath79, octeon, x86/64 Runtime-tested: ath79, octeon, x86/64 Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
* ath79: fix irq assignment for pci-ar71xx driverMatt Merhar2018-07-301-3/+7
| | | | | | | | | | | | | | | | | | In the new DT-based pci-ar71xx driver, ar71xx_pci_irq_init() was being called before populating the PCI controller's device_node struct member. This led to no IRQ being assigned to connected PCI devices (e.g. ath9k cards) and caused them to be non-functional aside from simply being detected. The previous errors encountered in dmesg were: "irq: no irq domain found for /ahb/apb/pcie-controller@180c0000 !". /proc/interrupts listed an IRQ of 0 for the cards. While this has been only been tested on a yet-to-be-merged RouterStation Pro target, it should also fix the broken wifi people have reported for the ath79 WNDR3800 target. Signed-off-by: Matt Merhar <mattmerhar@protonmail.com>
* ath79: add support for tl-wr841n-v9Lucian Cristian2018-07-305-1/+175
| | | | Signed-off-by: Lucian Cristian <lucian.cristian@gmail.com>
* ath79: Add switch reset definition in dtsChuanhong Guo2018-07-307-0/+14
| | | | Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: assert a switch reset if defined in dts.Chuanhong Guo2018-07-301-0/+9
| | | | Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ar724x: Fix reset definition for gmac0/gmac1Chuanhong Guo2018-07-303-12/+12
| | | | | | reset bit 8 is for builtin switch and bit 12 is marked 'reserved' on datasheet. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ar7240: Update dts for current ag71xx driverChuanhong Guo2018-07-303-26/+20
| | | | Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: Explicitly register mdio bus after ag71xx_hw_init() for ar7240Chuanhong Guo2018-07-301-0/+8
| | | | | | | | | | mdio bus isn't a standalone device on ar7240. (and maybe older SoCs?) Use simple-mfd for ar7241 and later SoCs to get mdio1 ready before gmac0 For ar7240 and older chips, manually create platform device after ag71xx_hw_init() in ag71xx_probe()to get mdio0 ready between ag71xx_hw_init() and ag71xx_phy_connect(). Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: Rework mdio clock settingsChuanhong Guo2018-07-302-26/+63
| | | | | | | Allow specifying desired mdio clock frequency in dts. Use default frequency around 5MHz for builtin switch and 2MHz for other mdio bus. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ar7242: Update dts for current ag71xx driverChuanhong Guo2018-07-301-2/+16
| | | | Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ar7241: Update dts for current ag71xx driverChuanhong Guo2018-07-306-44/+23
| | | | Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-30 12:30:35 +0000