Commit message (Collapse) | Author | Age | Files | Lines | |
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* | kernel: bump 4.14 to 4.14.93 | Stijn Tintel | 2019-01-14 | 1 | -6/+1 |
| | | | | | | | | | | | | | Refresh patches. Remove upstreamed patches: - backport/096-mips-math-emu-Write-protect-delay-slot-emulation-pages.patch - pending/510-f2fs-fix-sanity_check_raw_super-on-big-endian-machines.patch - brcm2708/950-0415-qmi_wwan-apply-SET_DTR-quirk-to-the-SIMCOM-shared-de.patch Compile-tested: ar71xx, ath79, brcm2708/bcm27{08,10}, octeon, x86/64 Runtime-tested: ar71xx, ath79, brcm2708/bcm27{08,10}, octeon, x86/64 Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be> | ||||
* | cns3xxx: use actual size reads for PCIe | Koen Vandeputte | 2019-01-07 | 1 | -0/+51 |
upstream commit 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors") reimplemented cns3xxx_pci_read_config() using pci_generic_config_read32(), which preserved the property of only doing 32-bit reads. It also replaced cns3xxx_pci_write_config() with pci_generic_config_write(), so it changed writes from always being 32 bits to being the actual size, which works just fine. Due to: - The documentation does not mention that only 32 bit access is allowed. - Writes are already executed using the actual size - Extensive testing shows that 8b, 16b and 32b reads work as intended It makes perfectly sense to also swap 32 bit reading in favor of actual size. Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com> |