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* uboot-envtools: add support for Aruba AP-303 and AP-365Jan Alexander2021-01-142-3/+0
| | | | | | | | | Both devices use u-boot env variables to boot OpenWrt from its flash partition. Using u-boot envtools, it is possible to change the bootcmd back to the stock firmware partition directly from OpenWrt without attaching a serial cable or even physically accessing the device. Signed-off-by: Jan Alexander <jan@nalx.net>
* ipq40xx: remove unnecessary execute permission bitSungbo Eo2021-01-031-0/+0
| | | | | | | | | DTS files do not need to be executable. 644 is enough. Fixes: 0fbdb51f7643 ("ipq40xx: add Edgecore OAP-100 support") Signed-off-by: Sungbo Eo <mans0n@gorani.run> [split by targets] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ipq40xx: remove non-existent ethernet PHYDavid Bauer2020-12-302-0/+8
| | | | | | | | | Since updating the MDIO driver, the probe will fail hard on any PHY not present on the bus, while this was not the case prior. Fixes commit 26b1f72381fb ("ipq40xx: net: phy: ar40xx: remove PHY handling") Signed-off-by: David Bauer <mail@david-bauer.net>
* ipq40xx: add support for GL.iNet GL-AP1300Dongming Han2020-12-251-0/+269
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specifications: SOC: Qualcomm IPQ4018 (DAKOTA) ARM Quad-Core RAM: 256 MiB FLASH1: 4 MiB NOR FLASH2: 128 MiB NAND ETH: Qualcomm QCA8075 WLAN1: Qualcomm Atheros QCA4018 2.4GHz 802.11b/g/n 2x2 WLAN2: Qualcomm Atheros QCA4018 5GHz 802.11n/ac W2 2x2 INPUT: Reset LED: Power, Internet UART1: On board pin header near to LED (3.3V, TX, RX, GND), 3.3V without pin - 115200 8N1 OTHER: On board with BLE module - by cp210x USB serial chip On board hareware watchdog with GPIO0 high to turn on, and GPIO4 for watchdog feed Install via uboot tftp or uboot web failsafe. By uboot tftp: (IPQ40xx) # tftpboot 0x84000000 openwrt-ipq40xx-generic-glinet_gl-ap1300-squashfs-nand-factory.ubi (IPQ40xx) # run lf By uboot web failsafe: Push the reset button for 10 seconds util the power led flash faster, then use broswer to access http://192.168.1.1 Afterwards upgrade can use sysupgrade image. Signed-off-by: Dongming Han <handongming@gl-inet.com>
* ipq40xx: net: ethernet: edma: use generic PHY printRobert Marko2020-12-231-2/+2
| | | | | | | | | | | | | Lets use the generic upstream phy_print_status() instead of doing something similar by hand. Before: ess_edma c080000.edma: eth1: GMAC Link is up with phy_speed=1000 After: ess_edma c080000.edma eth1: Link is Up - 1Gbps/Full - flow control rx/tx Signed-off-by: Robert Marko <robert.marko@sartura.hr>
* ipq40xx: net: ethernet: edma: use generic ksettings functionsRobert Marko2020-12-231-56/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we now have a proper PHY driver for QCA807x and AR803x has already been supported properly there is no need for the driver to be poking on PHY registers for ethtool ops. So, lets simply use the generic phy_ethtool_ksettings_get/phy_ethtool_ksettings_set functions. This also has the advantage of properly populating stuff other than speeds like, transceiver type, MDI-X etc. ethtool before: root@OpenWrt:/# ethtool eth1 Settings for eth1: Supported ports: [ TP MII ] Supported link modes: 10baseT/Half 10baseT/Full 100baseT/Half 100baseT/Full 1000baseT/Full 1000baseX/Full Supported pause frame use: Symmetric Receive-only Supports auto-negotiation: Yes Supported FEC modes: Not reported Advertised link modes: 10baseT/Half 10baseT/Full 100baseT/Half 100baseT/Full 1000baseT/Full 1000baseX/Full Advertised pause frame use: Symmetric Receive-only Advertised auto-negotiation: Yes Advertised FEC modes: Not reported Link partner advertised link modes: 10baseT/Half 10baseT/Full 100baseT/Half 100baseT/Full 1000baseT/Full Link partner advertised pause frame use: No Link partner advertised auto-negotiation: No Link partner advertised FEC modes: Not reported Speed: 1000Mb/s Duplex: Full Port: Twisted Pair PHYAD: 4 Transceiver: internal Auto-negotiation: on MDI-X: Unknown Supports Wake-on: d Wake-on: d Current message level: 0x00000000 (0) Link detected: yes ethtool after: root@OpenWrt:/# ethtool eth1 Settings for eth1: Supported ports: [ TP MII ] Supported link modes: 10baseT/Half 10baseT/Full 100baseT/Half 100baseT/Full 1000baseT/Full 1000baseX/Full Supported pause frame use: Symmetric Receive-only Supports auto-negotiation: Yes Supported FEC modes: Not reported Advertised link modes: 10baseT/Half 10baseT/Full 100baseT/Half 100baseT/Full 1000baseT/Full 1000baseX/Full Advertised pause frame use: Symmetric Receive-only Advertised auto-negotiation: Yes Advertised FEC modes: Not reported Link partner advertised link modes: 10baseT/Half 10baseT/Full 100baseT/Half 100baseT/Full 1000baseT/Full Link partner advertised pause frame use: Symmetric Receive-only Link partner advertised auto-negotiation: Yes Link partner advertised FEC modes: Not reported Speed: 1000Mb/s Duplex: Full Port: Twisted Pair PHYAD: 4 Transceiver: external Auto-negotiation: on MDI-X: off (auto) Supports Wake-on: d Wake-on: d Current message level: 0x00000000 (0) Link detected: yes Signed-off-by: Robert Marko <robert.marko@sartura.hr>
* ipq40xx: dts: convert PHY GPIO bindingsRobert Marko2020-12-232-22/+41
| | | | | | | | | | Since the new PHY driver manages each PHY individually and therefore registers each PHY that is marked with gpio-controller; DT property as a GPIO controller we need to convert old DT bindings to account for this. Only 2 boards use this so its not much of an issue. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
* ipq40xx: net: ethernet: edma: fix link detectionRobert Marko2020-12-231-0/+4
| | | | | | | PHY needs to be soft reset before starting it from ethernet driver as AR40xx calibration will leave it in unwanted state. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
* ipq40xx: net: phy: ar40xx: remove PHY handlingRobert Marko2020-12-231-225/+16
| | | | | | | | | | | | | | | Since we now have proper PHY driver for the QCA807x PHY-s, lets remove PHY handling from AR40xx. This removes PHY driver, PHY GPIO driver and PHY init code. AR40xx still needs to handle PSGMII calibration as that requires R/W from the switch, so I am unable to move it into PHY driver. This also converted the AR40xx driver to use OF_MDIO to find the MDIO bus as it now cant be set through the PHY driver. So lets depend on OF_MDIO in KConfig. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
* ipq40xx: add Qualcomm QCA807x driverRobert Marko2020-12-231-0/+828
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds driver for the Qualcomm QCA8072 and QCA8075 PHY-s. They are 2 or 5 port IEEE 802.3 clause 22 compliant 10BASE-Te, 100BASE-TX and 1000BASE-T PHY-s. They feature 2 SerDes, one for PSGMII or QSGMII connection with MAC, while second one is SGMII for connection to MAC or fiber. Both models have a combo port that supports 1000BASE-X and 100BASE-FX fiber. Each PHY inside of QCA807x series has 2 digitally controlled output only pins that natively drive LED-s. But some vendors used these to driver generic LED-s controlled by user space, so lets enable registering each PHY as GPIO controller and add driver for it. This also adds the ability to specify DT properties so that 1000 Base-T LED will also be lit up for 100 and 10 Base connections. This is usually done by U-boot, but boards running mainline U-boot are not configuring this yet. These PHY-s are commonly used in Qualcomm IPQ40xx, IPQ60xx and IPQ807x boards. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
* ipq40xx: edma: convert to of_mdio_find_bus()Robert Marko2020-12-231-21/+4
| | | | | | | | | | | | | | With the reworked MDIO driver, EDMA will fail to get the MII BUS as it used the MII BUS stored inside the MDIO structure private data. This obviously does not work with the modernized driver, so lets switch to using a purpose build of_mdio_find_bus() which will return the MII BUS and only requires the MDIO node to be passed. This is easy as we already have the node parsed. Also, since we now require OF_MDIO add that as dependency. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
* ipq40xx: add support for devolo Magic 2 WiFi nextStefan Schake2020-12-221-0/+268
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SOC: IPQ4018 / QCA Dakota CPU: Quad-Core ARMv7 Processor rev 5 (v71) Cortex-A7 DRAM: 256 MiB NOR: 32 MiB ETH: Qualcomm Atheros QCA8075 (2 ports) PLC: MaxLinear G.hn 88LX5152 WLAN1: Qualcomm Atheros QCA4018 2.4GHz 802.11bgn 2:2x2 WLAN2: Qualcomm Atheros QCA4018 5GHz 802.11a/n/ac 2:2x2 INPUT: RESET, WiFi, PLC Button LEDS: red/white home, white WiFi To modify a retail device to run OpenWRT firmware: 1) Setup a TFTP server on IP address 192.168.0.100 and copy the OpenWRT initramfs (initramfs-fit-uImage.itb) to the TFTP root as 'uploadfile'. 2) Power on the device while pressing the recessed reset button next to the Ethernet ports. This causes the bootloader to retrieve and start the initramfs. 3) Once the initramfs is booted, the device will come up with IP 192.168.1.1. You can then connect through SSH (allow some time for the first connection). 4) On the device shell, run 'fw_printenv' to show the U-boot environment. Backup this information since it contains device unique factory data. 5) Change the boot command to support booting OpenWRT: # fw_setenv bootcmd 'sf probe && sf read 0x84000000 0x180000 0x400000 && bootm' 6) Change directory to /tmp, download the sysupgrade (e.g. through wget) and install it with sysupgrade. The device will reboot into OpenWRT. Notice that there is currently no support for booting the G.hn chip. This requires userland software we lack the rights to share right now. Signed-off-by: Stefan Schake <stefan.schake@devolo.de>
* ipq40xx: add support for Plasma Cloud PA2200Marek Lindner2020-12-221-0/+210
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Device specifications: * QCA IPQ4019 * 256 MB of RAM * 32 MB of SPI NOR flash (w25q256) - 2x 15 MB available; but one of the 15 MB regions is the recovery image * 2T2R 2.4 GHz - QCA4019 hw1.0 (SoC) - requires special BDF in QCA4019/hw1.0/board-2.bin with bus=ahb,bmi-chip-id=0,bmi-board-id=20,variant=PlasmaCloud-PA2200 * 2T2R 5 GHz (channel 36-64) - QCA9888 hw2.0 (PCI) - requires special BDF in QCA9888/hw2.0/board-2.bin bus=pci,bmi-chip-id=0,bmi-board-id=16,variant=PlasmaCloud-PA2200 * 2T2R 5 GHz (channel 100-165) - QCA4019 hw1.0 (SoC) - requires special BDF in QCA4019/hw1.0/board-2.bin with bus=ahb,bmi-chip-id=0,bmi-board-id=21,variant=PlasmaCloud-PA2200 * GPIO-LEDs for 2.4GHz, 5GHz-SoC and 5GHz-PCIE * GPIO-LEDs for power (orange) and status (blue) * 1x GPIO-button (reset) * TTL pins are on board (arrow points to VCC, then follows: GND, TX, RX) * 2x gigabit ethernet - phy@mdio3: + Label: Ethernet 1 + gmac0 (ethaddr) in original firmware + used as LAN interface - phy@mdio4: + Label: Ethernet 2 + gmac1 (eth1addr) in original firmware + 802.3at POE+ + used as WAN interface * 12V 2A DC Flashing instructions: The tool ap51-flash (https://github.com/ap51-flash/ap51-flash) should be used to transfer the factory image to the u-boot when the device boots up. Signed-off-by: Marek Lindner <marek.lindner@kaiwoo.ai> [sven@narfation.org: prepare commit message, rebase, use all LEDs, switch to dualboot_datachk upgrade script, use eth1 as designated WAN interface] Signed-off-by: Sven Eckelmann <sven@narfation.org>
* ipq40xx: add support for Plasma Cloud PA1200Marek Lindner2020-12-221-0/+197
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Device specifications: * QCA IPQ4018 * 256 MB of RAM * 32 MB of SPI NOR flash (w25q256) - 2x 15 MB available; but one of the 15 MB regions is the recovery image * 2T2R 2.4 GHz - QCA4019 hw1.0 (SoC) - requires special BDF in QCA4019/hw1.0/board-2.bin with bus=ahb,bmi-chip-id=0,bmi-board-id=16,variant=PlasmaCloud-PA1200 * 2T2R 5 GHz - QCA4019 hw1.0 (SoC) - requires special BDF in QCA4019/hw1.0/board-2.bin with bus=ahb,bmi-chip-id=0,bmi-board-id=17,variant=PlasmaCloud-PA1200 * 3x GPIO-LEDs for status (cyan, purple, yellow) * 1x GPIO-button (reset) * 1x USB (xHCI) * TTL pins are on board (arrow points to VCC, then follows: GND, TX, RX) * 2x gigabit ethernet - phy@mdio4: + Label: Ethernet 1 + gmac0 (ethaddr) in original firmware + used as LAN interface - phy@mdio3: + Label: Ethernet 2 + gmac1 (eth1addr) in original firmware + 802.3af/at POE(+) + used as WAN interface * 12V/24V 1A DC Flashing instructions: The tool ap51-flash (https://github.com/ap51-flash/ap51-flash) should be used to transfer the factory image to the u-boot when the device boots up. Signed-off-by: Marek Lindner <marek.lindner@kaiwoo.ai> [sven@narfation.org: prepare commit message, rebase, use all LEDs, switch to dualboot_datachk upgrade script, use eth1 as designated WAN interface] Signed-off-by: Sven Eckelmann <sven@narfation.org>
* ipq40xx: revert usage of VLAN S-TAGDavid Bauer2020-12-142-37/+9
| | | | | | | | | | | This reverts the usage of the S-Tag for separating LAN and WAN port on the embedded switch. Many users complained about not being able to manage C-Tag addition / removal on the switch as well as degraded performance. Fixes: commit 9da2b567605b ("ipq40xx: fix ethernet vlan double tagging") Signed-off-by: David Bauer <mail@david-bauer.net>
* ipq40xx: fix 5Ghz tx/rx power on the ASUS MAP-AC2200Yushi Nishida2020-12-131-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | The ASUS MAP-AC2200 suffers from a lower transmit/receive signal power as compared to the stock firmware. Upon investigation, it was discovered that stock firmware from the GPL_MAP-AC2200_3.0.0.4.384.46249-g97d05bb.tar archive. set the following GPIOs in "release/src/router/rc/init.c". GPIO 44 and 46 have to be set to output high GPIO 45 and 47 have to be set to output low Here are some results, after activating the relevant gpios through cmdline: <https://forum.openwrt.org/t/asus-map-ac2200-low-transmit-receive-signal-5ghz/69005/12> THX @ slh Fixes: 9ad3967f140 ("ipq40xx: add support for ASUS Lyra") Signed-off-by: Yushi Nishida <kyro2man@gmx.net> [slightly rewritten commit, added missing <>) Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ipq40xx: DTS style updates for OpenMesh devicesSven Eckelmann2020-11-232-46/+18
| | | | | | | | | | | | | | | | | The OpenMesh related files were not updated since a while and the new coding style requirements weren't integrated. This can cause problems for new devices when an author uses these files as starting point. * use SPDX-License-Identifiers instead of full license texts * drop linux,default-trigger with value default-off for LEDs * led nodes with label "abc:xyz" should have name "xyz_abc" * led DT labels for "xyz_abc" should be "led_xyz_abc" * "m25p80@0" flash node should be renamed to "flash@0" * drop unnecessary empty lines Signed-off-by: Sven Eckelmann <sven@narfation.org> [minor commit title and message adjustments] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ipq40xx: enable RX hash / CTAG TX offloading for single-phyDavid Bauer2020-11-011-0/+9
| | | | | | | | | | | | This re-enables offloading features disabled by commit 9da2b567605b ("ipq40xx: fix ethernet vlan double tagging"). Single-PHY devices use port-based VLANs on the switch, therefore no S-TAG magic is involved here. Re-enabling these features restores throughput back to 950 Mbit/s. Reported-by: Jannis Pinter <jannis@pinterjann.is> Signed-off-by: David Bauer <mail@david-bauer.net>
* ipq40xx: remove support for kernel 4.19Adrian Schmutzler2020-10-198-0/+7229
| | | | | | | | | | The target uses 5.4 as default kernel since 03/2020. Kernel 4.19 support is not really maintained anymore, it does not seem to be needed, and removing it will make upcoming driver updates easier. Thus, remove it. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ipq40xx: use upstream DTS files for IPQ4019/AP-DK04.1Adrian Schmutzler2020-10-072-202/+0
| | | | | | | | | | | | | | Upstream provides DTS(I) files for IPQ4019/AP-DK04.1, but we overwrite them with local versions so far. Remove the local files and use patches to be closer to upstream. We already do the same for IPQ40xx/AP-DK01.1-C1. Technically, this changes the compatible from "qcom,ipq4019" to "qcom,ipq4019-dk04.1-c1", but it has never been implemented correctly beforehand anyway. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ipq40xx: improve support for Edgecore ECW5211Sungbo Eo2020-10-071-27/+25
| | | | | | | | | | | | | | | | | | | This adds several stylistic and functional improvements of the recently added Edgecore ECW5211, especially: * Drop the local BDFs as those are already in the upstream under different names * Add SPDX tag to DTS * Add label MAC address * Move LED trigger to DTS * Remove unnecessary status="okay" * Disable unused SS USB phy as the USB port only supports USB 2.0 * Make uboot-env partition writable * Remove qcom,poll_required_dynamic property as the driver does not use it * Tidy up the device recipe Fixes: 4488b260a02e ("ipq40xx: add Edgecore ECW5211 support") Signed-off-by: Sungbo Eo <mans0n@gorani.run> Acked-by: Robert Marko <robert.marko@sartura.hr>
* ipq40xx: remove model name from LED labelsAdrian Schmutzler2020-10-0738-182/+182
| | | | | | | | | | | Like in the previous patches for ath79 and ramips, this will remove the "devicename" from LED labels in ipq40xx. The devicename is removed in DTS files and 01_leds, and a migration script is added. While at it, also harmonize capitalization of wlan2G/wlan5G vs. wlan2g/wlan5g. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ipq40xx: tidy up dts-v1 statementsAdrian Schmutzler2020-09-258-16/+1
| | | | | | | | | | | | | | | | | | | | | The "/dts-v1/;" identifier is supposed to be present once at the top of a device tree file after the includes have been processed. Therefore, adding it to a DTS _and_ a DTSI file is actually wrong, as it will be present twice then (though the compiler does not complain about it). In ipq40xx, the dts-v1 statement is already included in qcom-ipq4019.dtsi, so we don't have to add it anywhere at all. However, based on the conditions stated above, this requires qcom-ipq4019.dtsi to be included as the first file in any DTS(I). Consequently, this patch removes all cases of dts-v1 for the ipq40xx target, and moves the includes accordingly where necessary. While at it, remove a few obviously unneeded includes on the way. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ipq40xx: fix DTS warning in qcom-ipq4029-gl-s1300.dtsChristian Lamparter2020-09-251-1/+1
| | | | | | | .dts:226.17-230.4: Warning (spi_bus_reg): /soc/spi@78b6000/spi@1: SPI bus unit address format error, expected "0" Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ipq40xx: fix DTS warning in qcom-ipq4019-cm520-79f.dtsChristian Lamparter2020-09-251-1/+1
| | | | | | | | | | | | .dts:121.4-14: Warning (reg_format): /led_spi/led_gpio@0:reg: \ property has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1) .dtb: Warning (pci_device_bus_num): Failed prerequisite 'reg_format' .dtb: Warning (i2c_bus_reg): Failed prerequisite 'reg_format' .dtb: Warning (spi_bus_reg): Failed prerequisite 'reg_format' .dts:119.24-126.5: Warning (avoid_default_addr_size): /led_spi/led_gpio@0: \ Relying on default #size-cells value Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ipq40xx: Add support for Linksys MR8300 (Dallas)Hans Geiblinger2020-09-253-305/+387
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Linksys MR8300 is based on QCA4019 and QCA9888 and provides three, independent radios. NAND provides two, alternate kernel/firmware images with fail-over provided by the OEM U-Boot. Hardware Highlights: SoC: IPQ4019 at 717 MHz (4 CPUs) RAM: 512MB RAM SoC: Qualcomm IPQ4019 at 717 MHz (4 CPUs) RAM: 512M DDR3 FLASH: 256 MB NAND (Winbond W29N02GV, 8-bit parallel) ETH: Qualcomm QCA8075 (4x GigE LAN, 1x GigE Internet Ethernet Jacks) BTN: Reset and WPS USB: USB3.0, single port on rear with LED SERIAL: Serial pads internal (unpopulated) LED: Four status lights on top + USB LED WIFI1: 2x2:2 QCA4019 2.4 GHz radio on ch. 1-14 WIFI2: 2x2:2 QCA4019 5 GHz radio on ch. 36-64 WIFI3: 2x2:2 QCA9888 5 GHz radio on ch. 100-165 Support is based on the already supported EA8300. Key differences: EA8300 has 256MB RAM where MR8300 has 512MB RAM. MR8300 has a revised top panel LED setup. Installation: "Factory" images may be installed directly through the OEM GUI using URL: https://ip-of-router/fwupdate.html (Typically 192.168.1.1) Signed-off-by: Hans Geiblinger <cybrnook2002@yahoo.com> [copied Hardware-highlights from EA8300. Fixed alphabetical order. fixed commit subject, removed bogus unit-address of keys, fixed author (used Signed-off-By to From:) ] Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ipq40xx: add support for Luma Home WRTQ-329ACNTomasz Maciej Nowak2020-09-251-0/+277
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Luma Home WRTQ-329ACN, also known as Luma WiFi System, is a dual-band wireless access point. Specification SoC: Qualcomm Atheros IPQ4018 RAM: 256 MB DDR3 Flash: 2 MB SPI NOR 128 MB SPI NAND WIFI: 2.4 GHz 2T2R integrated 5 GHz 2T2R integrated Ethernet: 2x 10/100/1000 Mbps QCA8075 USB: 1x 2.0 Bluetooth: 1x 4.0 CSR8510 A10, connected to USB bus LEDS: 16x multicolor LEDs ring, controlled by MSP430G2403 MCU Buttons: 1x GPIO controlled EEPROM: 16 Kbit, compatible with AT24C16 UART: row of 4 holes marked on PCB as J19, starting count from the side of J19 marking on PCB 1. GND, 2. RX, 3. TX, 4. 3.3V baud: 115200, parity: none, flow control: none The device supports OTA or USB flash drive updates, unfotunately they are signed. Until the signing key is known, the UART access is mandatory for installation. The difficult part is disassembling the casing, there are a lot of latches holding it together. Teardown Prepare three thin, but sturdy, prying tools. Place the device with back of it facing upwards. Start with the wall having a small notch. Insert first tool, until You'll feel resistance and keep it there. Repeat the procedure for neighbouring walls. With applying a pressure, one edge of the back cover should pop up. Now carefully slide one of the tools to free the rest of the latches. There's no need to solder pins to the UART holes, You can use hook clips, but wiring them outside the casing, will ease debuging and recovery if problems occur. Installation 1. Prepare TFTP server with OpenWrt initramfs image. 2. Connect to UART port (don't connect the voltage pin). 3. Connect to LAN port. 4. Power on the device, carefully observe the console output and when asked quickly enter the failsafe mode. 5. Invoke 'mount_root'. 6. After the overlayfs is mounted run: fw_setenv bootdelay 3 This will allow to access U-Boot shell. 7. Reboot the device and when prompted to stop autoboot, hit any key. 8. Adjust "ipaddr" and "serverip" addresses in U-Boot environment, use 'setenv' to do that, then run following commands: tftpboot 0x84000000 <openwrt_initramfs_image_name> bootm 0x84000000 and wait till OpenWrt boots. 9. In OpenWrt command line run following commands: fw_setenv openwrt "setenv mtdids nand1=spi_nand; setenv mtdparts mtdparts=spi_nand:-(ubi); ubi part ubi; ubi read 0x84000000 kernel; bootm 0x84000000" fw_setenv bootcmd "run openwrt" 10. Transfer OpenWrt sysupgrade image to /tmp directory and flash it with: ubirmvol /dev/ubi0 -N ubi_rootfs sysupgrade -v -n /tmp/<openwrt_sysupgrade_image_name> 11. After flashing, the access point will reboot to OpenWrt, then it's ready for configuration. Reverting to OEM firmware 1. Execute installation guide steps: 1, 2, 3, 7, 8. 2. In OpenWrt command line run following commands: ubirmvol /dev/ubi0 -N rootfs_data ubirmvol /dev/ubi0 -N rootfs ubirmvol /dev/ubi0 -N kernel ubirename /dev/ubi0 kernel1 kernel ubi_rootfs1 ubi_rootfs ubimkvol /dev/ubi0 -S 34 -N kernel1 ubimkvol /dev/ubi0 -S 320 -N ubi_rootfs1 ubimkvol /dev/ubi0 -S 264 -N rootfs_data fw_setenv bootcmd bootipq 3. Reboot. Known issues The LEDs ring doesn't have any dedicated driver or application to control it, the only available option atm is to manipulate it with 'i2cset' command. The default action after applying power to device is spinning blue light. This light will stay active at all time. To disable it install 'i2c-tools' with opkg and run: i2cset -y 2 0x48 3 1 0 0 i The light will stay off until next cold boot. Additional information After completing 5. step from installation guide, one can disable asking for root password on OEM firmware by running: sed -e 's/root:x:/root::/' -i /etc/passwd This is useful for investigating the OEM firmware. One can look at the communication between the stock firmware and the vendor's cloud servers or as a way of making a backup of both flash chips. The root password seems to be constant across all sold devices. This is output of 'led_ctl' from OEM firmware to illustrate possibilities of LEDs ring: Usage: led_ctl [status | upgrade | force_upgrade | version] led_ctl solid COLOR <brightness> led_ctl single COLOR INDEX <brightness 0 - 15> led_ctl spinning COLOR <period 1 - 16 (lower = faster)> led_ctl fill COLOR <period 1 - 16 (lower = faster)> ( default is 5 ) led_ctl flashing COLOR <on dur 1 - 128> <off dur 1 - 128> (default is 34) ( default is 34 ) led_ctl pulsing COLOR COLOR: red, green, blue, yellow, purple, cyan, white Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl> [squash "ipq-wifi: add BDFs for Luma Home WRTQ-329ACN" into commit, changed ubi volumes for easier integration, slightly reworded commit message, changed ubi volume layout to use standard names all around] Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* target: update SPDX license namesAdrian Schmutzler2020-09-228-8/+8
| | | | | | | SPDX moved from GPL-2.0 to GPL-2.0-only and from GPL-2.0+ to GPL-2.0-or-later. Reflect that in the SPDX license headers. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ipq40xx: enable FRITZRepeater 3000 ports on switchDavid Bauer2020-09-171-2/+7
| | | | | | | | | | | | The ethernet ports on the AVM FRITZRepeater 3000 are not separated between LAN and WAN in the stock firmware. OpenWrt currently abstracts port 4 as eth0 and port 5 as eth1, bridging them in the kernel. This patch adjusts the GMAC port bitmasks and default bitmask for ar40xx to bridge them on the switch, avoiding traffic on both ports to pass thru the CPU. Signed-off-by: David Bauer <mail@david-bauer.net>
* ipq40xx: add Edgecore OAP-100 supportJohn Crispin2020-09-171-0/+339
| | | | | | | | | | | | | | | | flashing the unit * first update to latest edcore FW as per the PDF instructions * boot the initramfs - tftpboot 0x88000000 openwrt-ipq40xx-generic-edgecore_oap100-initramfs-fit-uImage.itb; bootm * inside the initramfs call the following commiands - ubiattach -p /dev/mtd0 - ubirmvol /dev/ubi0 -n0 - ubirmvol /dev/ubi0 -n1 - ubirmvol /dev/ubi0 -n2 * scp the sysupgrade image to the board and call - sysupgrade -n openwrt-ipq40xx-generic-edgecore_oap100-squashfs-nand-sysupgrade.bin Signed-off-by: John Crispin <john@phrozen.org>
* ipq40xx: add Edgecore ECW5211 supportRobert Marko2020-09-171-0/+325
| | | | | | | | | | | | | | | | | This patch adds support for the Edgecore ECW5211 indoor AP. Specification: - SoC: Qualcomm Atheros IPQ4018 ARMv7-A 4x Cortex A-7 - RAM: 256MB DDR3 - NOR Flash: 16MB SPI NOR - NAND Flash: 128MB MX35LFxGE4AB SPI-NAND - Ethernet: 2 x 1G via Q8075 PHY connected to ethernet adapter via PSGMII (802.3af POE IN on eth0) - USB: 1 x USB 3.0 SuperSpeed - WLAN: Built-in IPQ4018 (2x2 802.11bng, 2x2 802.11 acn) - CC2540 BLE connected to USB 2.0 port - Atmel AT97SC3205T I2C TPM Signed-off-by: Robert Marko <robert.marko@sartura.hr>
* ipq40xx: support reset button for WPJ419Phi Nguyen2020-07-231-0/+10
| | | | | | Compex WPJ419 has a reset button on a GPIO pin. Signed-off-by: Phi Nguyen <phind.uet@gmail.com>
* ipq40xx: add support for Buffalo WTR-M2133HPYanase Yuki2020-07-081-0/+419
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Buffalo WTR-M2133HP is a Tri-Band router based on IPQ4019. Specification ------------- - SoC: Qualcomm IPQ4019 - RAM: 512MiB - Flash Memory: NAND 128MiB (MXIC MX30LF1G18AC) - Wi-Fi: Qualcomm IPQ4019 (2.4GHz, 1ch - 13ch) - Wi-Fi: Qualcomm IPQ4019 (5GHz, 36ch - 64ch) - Wi-Fi: Qualcomm QCA9984 (2T2R, 5GHz, 100ch - 140ch) - Ethernet: 4x 10/100/1000 Mbps (1x WAN, 3x LAN) - LED: 4x white LED, 4x orange LED, 1x blue LED - USB: 1x USB 3.0 port - Input: 2x tactile switch, 2x slide switch (2x SP3T) - Serial console: 115200bps, pinheader JP5 on PCB - Power: DC 12V 2A Flash instruction ----------------- 1. Set up a TFTP server (IP address: 192.168.11.10) 2. Rename "initramfs-fit-uImage.itb" to "WTR-M2133HP-initramfs.uImage" and put it into the TFTP server directory. 3. Connect the TFTP server and WTR-M2133HP. 4. Hold down the AOSS button, then power on the router. 5. After booting OpenWrt initramfs image, connect to the router by SSH. 6. Transfer "squashfs-nand-factory.ubi" to the router. 7. Execute the following commands. # ubidetach -p /dev/mtd15 # ubiformat /dev/mtd15 -f /tmp/openwrt-ipq40xx-generic-buffalo_wtr-m2133hp-squashfs-nand-factory.ubi # fw_setenv bootcmd bootipq 8. Perform reboot. Recover to stock firmware ------------------------- 1. Execute the following command. # fw_setenv bootcmd bootbf 2. Reboot and wait several minutes. Signed-off-by: Yanase Yuki <dev@zpc.sakura.ne.jp>
* ipq40xx: add support for GL.iNet GL-S1300Dongming Han2020-07-081-0/+356
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specifications: SOC: Qualcomm IPQ4029 (DAKOTA) ARM Quad-Core RAM: 512 MiB FLASH1: 16 MiB NOR - SPI0 FLASH2: 8 GiB eMMC ETH: Qualcomm QCA8075 WLAN1: Qualcomm Atheros QCA4029 2.4GHz 802.11b/g/n 2x2 WLAN2: Qualcomm Atheros QCA4029 5GHz 802.11n/ac W2 2x2 INPUT: Reset, WPS LED: Power, Mesh, WLAN UART1: On board pin header near to LED (3.3V, TX, RX, GND), 3.3V without pin - 115200 8N1 UART2: On board with BLE module SPI1: On board socket for Zigbee module Install via tftp - NB: need to flash transition image firstly Firstly install transition image: (IPQ40xx) # tftpboot 0x84000000 s1300-factory-to-openwrt.img (IPQ40xx) # sf probe && imgaddr=0x84000000 && source :script Secondly install openwrt sysupgrade bin: (IPQ40xx) # run lf Revert to factory image: (IPQ40xx) # tftpboot 0x84000000 s1300-openwrt-to-factory.img (IPQ40xx) # sf probe && imgaddr=0x84000000 && source :script The kernel and rootfs of factory firmware are on eMMC, and openwrt firmware is on NOR flash. The transition image includes U-boot and partition table, which decides where to load kernel and rootfs. After you firstly install openwrt image, you can switch between factory and openwrt firmware by flashing transition image. Signed-off-by: Dongming Han <handongming@gl-inet.com>
* ipq40xx: consolidate DTS filesAdrian Schmutzler2020-06-2344-0/+10752
The DTS files in files-4.19 and files-5.4 are exactly identical except for one file (qcom-ipq4018-emr3500.dts), which is only present for 5.4. Since there is no point in maintaining all these identical files twice, this patch moves them to the "files" directory. If there ever was a new kernel with substantial DTS changes, a new folder would need to be introduced anyway and could easily be done. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-02 04:41:22 +0000