openwrt/upstream - upstream openwrt

	Commit message (Collapse)	Author	Age	Files	Lines
*	mediatek: sync MT7986 device trees with upstream	Daniel Golle	2023-06-09	1	-1/+1
\| \| \| \| \| \| \| \| \|	Sync device tree files for MT7986 boards with what landed in upstream Linux tree to easy maintainance and also allow for a smooth update to Linux 6.1. Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit 7a0ec001ff79b12beefb8f3773820bfedebbb340)
*	mediatek: add driver for built-in 2.5G Ethernet PHY	Daniel Golle	2023-05-24	1	-0/+262
\| \| \| \| \| \| \| \| \|	Add driver for the built-in 2.5G Ethernet PHY found in the MT7988 SoC. To function the PHY also needs firmware files which have not yet been published via linux-firmware. Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit ef2a831dabacfda6c36c79b8f963b5fdd9b2d080)
*	mediatek: update pending SoC Ethernet PHY driver	Daniel Golle	2023-05-24	1	-0/+1263
\| \| \| \| \| \| \| \|	Update driver for MediaTek's built-in Gigabit Ethernet PHYs which can be found in the MT7981 and MT7988 SoCs. Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit 987a0b2b3011a9e5ee3e4120b068fb2f113628a7)
*	mediatek: add mt7988 pinctrl driver support	Sam Shih	2023-05-24	1	-0/+1281
\| \| \| \| \| \| \| \|	This adds provisional pinctrl driver support for the MediaTek MT7988 SoC. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit 9e6a7e808f2e9dd02733ccc41827940fb421091d)
*	mediatek: add mt7988 clock drivers support	Sam Shih	2023-05-24	4	-0/+1333
\| \| \| \| \| \| \| \|	This adds clock drivers for the MediaTek MT7988 SoC Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit b33c1858767e5109913ac2195ec2b2b8ef0e726a)
*	mediatek: sync pinctrl-mt7981 and pinctrl-mt7986 drivers	Daniel Golle	2023-04-13	2	-25/+150
\| \| \| \| \| \| \|	Now that new pinconf features have been backported sync pinctrl-mt7981 and pinctrl-m7986 with bleeding-edge upstream versions. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
*	mediatek: backport pinctrl driver for MT7981 SoC	Daniel Golle	2023-03-27	1	-0/+993
\| \| \| \| \| \| \|	Backport the pinctrl driver for the MT7981 SoC. The driver has also been submitted upstream and is part of Linux 6.3. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
*	mediatek: backport clk driver for MT7981 SoC	Daniel Golle	2023-03-27	4	-0/+926
\| \| \| \| \| \| \|	Backport driver for common clocks in MT7981 SoC. The driver has also been submitted upstream and became part of Linux 6.3. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
*	mediatek: filogic: consolidate adc '32k' clock	Daniel Golle	2022-10-20	1	-1/+1
\| \| \| \| \| \| \| \| \| \|	Add dependency to '32k' ADC clock so it is always enabled for thermal and raw access to ADC values. This allows to remove the patch for the ADC driver and reduce the patch adding thermal support for MT7986 to only add the new efuse layout and temperature decoding for V3. Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
*	mediatek: add mt7986 soc support to the target	Sam Shih	2022-08-28	5	-0/+1731
	It will be supported by the new filogic subtarget Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: Daniel Golle <daniel@makrotopia.org>