openwrt/upstream - upstream openwrt

	Commit message (Collapse)	Author	Age	Files	Lines
*	target: mpc85xx: tl_wdr4900_v1: drop 'fsl_rstcr_restart' hook	Alexandru Ardelean	2017-05-02	1	-1/+0
\| \| \| \| \| \| \| \| \| \| \| \|	Since commit: http://github.com/torvalds/linux/commit/7120438e5d82f445acbfe131a1b58eab7e83fa33 Seems that fsl_rstcr_restart() has been converted to a reset handler and dropped as hook/callback. Apply the same to the `tl_wdr4900_v1` target. Signed-off-by: Alexandru Ardelean <ardeleanalex@gmail.com>
*	mpc85xx/tl-wdr4900: correct address of the gpio controller	John Crispin	2016-02-26	1	-1/+1
\| \| \| \| \| \| \| \|	since linux 3.19 the address of the gpio-controller changed Signed-off-by: Alexander Couzens <lynxis@fe80.eu> SVN-Revision: 48794
*	mpc85xx: fix TL-WDR4900 mac address assignment to match original firmware	Felix Fietkau	2016-02-07	1	-1/+1
\| \| \| \| \| \|	Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 48645
*	mpc85xx: Add PTP node for TL-WD4900 in device tree	Felix Fietkau	2016-01-17	1	-0/+13
\| \| \| \| \| \| \| \| \| \| \| \|	PTP requires at least one timer to be 1PPS so describe it. For testing, load kernel module gianfar_ptp and use ptp4l from linuxptp. Copied from FSL P1010RDB reference design. Signed-off-by: Wojciech Dubowik <Wojciech.Dubowik@neratec.com> SVN-Revision: 48275
*	mpc85xx: fix up m25p80 device id (#21286)	Felix Fietkau	2015-12-02	1	-1/+1
\| \| \| \| \| \|	Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 47691
*	mpc85xx: Enable RFKill and USB Power GPIO Control for WDR4900v1	John Crispin	2015-07-09	1	-0/+11
\| \| \| \| \| \| \| \| \|	This patch adds the RFKill GPIO control switch and enables another GPIO to control power supply to USB Ports by emulating an LED GPIO for WDR4900v1. Signed-off-by: Guo Wei Lim <alphasparc@gmail.com> SVN-Revision: 46279
*	mpc85xx: TL-WDR4900: Fix port 6 being shown as up (10MBit/half) in LUCI/swconfig	Felix Fietkau	2015-05-25	1	-0/+1
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Currently port 6 is shown as up 10MBit/half in LUCI and swconfig. Reason is that all bits in the port 6 config are zero. This means that also the aneg flag is not set and in this case ar8216_read_port_link hardcodes the link to be up. This is no real problem but a little annoying. To fix this initialize port 6 with the aneg bit enabled. This causes ar8216_read_port_link to evaluate the link status bit which is always zero for port 6 as no PHY is connected to this port. And it doesn't hurt as port 6 isn't connected to anything on TL-WDR4900. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 45749
*	mpc85xx: replace WDR4900 uci-defaults ethernet MAC address hack with DTS entry	Imre Kaloz	2015-05-03	1	-1/+2
\| \| \| \| \| \| \| \| \|	This also changes the MAC address to one of the adresses actually used by the stock firmware on one of the ethernet interfaces. Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net> SVN-Revision: 45599
*	mpc85xx: move newly created files from patch files to files directory	Imre Kaloz	2015-05-03	3	-0/+525
	This will make these files much more maintainable. Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net> SVN-Revision: 45597