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Removed upstreamed:
target/linux/mvebu/patches-5.4/001-PCI-aardvark-Wait-for-endpoint-to-be-ready-before-tr.patch
target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch
target/linux/mvebu/patches-5.4/017-PCI-aardvark-Improve-link-training.patch
target/linux/mvebu/patches-5.4/018-PCI-aardvark-Issue-PERST-via-GPIO.patch
target/linux/mvebu/patches-5.4/020-arm64-dts-marvell-armada-37xx-Set-pcie_reset_pin-to-.patch
The following patch does not apply to upstream any more and needs some
more work to make it work fully again. I am not sure if we are still
able to set the UART to a none standard baud rate.
target/linux/ath79/patches-5.4/921-serial-core-add-support-for-boot-console-with-arbitr.patch
These patches needed manually changes:
target/linux/generic/pending-5.4/110-ehci_hcd_ignore_oc.patch
target/linux/ipq806x/patches-5.4/0065-arm-override-compiler-flags.patch
target/linux/layerscape/patches-5.4/804-crypto-0016-MLKU-114-1-crypto-caam-reduce-page-0-regs-access-to-.patch
target/linux/mvebu/patches-5.4/019-PCI-aardvark-Add-PHY-support.patch
target/linux/octeontx/patches-5.4/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch
All others updated automatically.
Compile-tested on: malta/le, armvirt/64, lantiq/xrx200
Runtime-tested on: malta/le, armvirt/64, lantiq/xrx200
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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Refreshed all patches.
Compile-tested on: ath79, lantiq, ipq40xx, x86_64
Runtime-tested on: ipq40xx, x86_64
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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All modification made by update_kernel.sh in a fresh clone without
existing toolchains.
Build system: x86_64
Build-tested: ipq806x/R7800, bcm27xx/bcm2711
Run-tested: ipq806x/R7800
Compile-tested [*]: ath79/{tiny,generic}, ipq40xx, octeon,
ramips/mt7621, realtek, x86/64
Run-tested [*]: ath79/generic, ipq40xx, octeon, ramips/mt7621
No dmesg regressions, everything functional
Signed-off-by: John Audia <graysky@archlinux.us>
Tested-by: Stijn Segers <foss@volatilesystems.org> [*]
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this adds support for the SoC timer of the RTL9300 chips, it
provides 6 independent timer/counters, of which the first one
is used as a clocksource and the second one as event timer.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
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