| Commit message (Collapse) | Author | Age | Files | Lines |
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Convert gpiolib realization to platform driver and move to the
appropriate subdirectory. Misc GPIO interrupt acknowledgement placed
to the MISC IRQ handler since in fact we can detect only one GPIO state
change.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42512
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Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42511
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Call generic_handle_irq() instead of do_IRQ() for chained interrupts,
remove XXX_NONE interrupts and call spurious_interrupt() when an interrupt
is unexpected.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42510
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Implement to_irq() handler for AR2315 GPIO chip and convert custom
gpio.h header to stub.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42509
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Rename config symbols to be consistent with other SoCs config symbols
supported by MIPS arch.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42508
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Tested with AR2315, AR2316 and AR2317 SoCs, not tested with AR2318 but
changes seems correct: revision is one more than AR2317.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42507
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Convert the PCI controller support code to platform driver and move it to
appropriate subdirectory.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42506
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Rename configuration symbol to be consistent with other MIPS machines.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42505
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Remove duplicated macroses, which define DMA offset (SDRAM baseaddress).
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42504
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It seems that the PCI controller does not support I/O ports, so remove
the ports range. Also correct the beginning of the memory range and its
size.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42503
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Use __raw_{read,write}l accessors and use Abort interrupt to detect a
configuration space read/write errors. The second change improves errors
detection, what improves the device presence detection and helps us to
avoid following (and similar) errors:
pci 0000:00:00.2: ignoring class 0x7e0200 (doesn't match header type 02)
pci 0000:00:00.2: bridge configuration invalid ([bus 03-90]), reconfiguring
pci 0000:00:00.2: not setting up bridge for bus 0000:01
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42502
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Add PCI IRQ controller to facilitate interrupt handling, move interrupts
initialization to the IRQ controller initialization from
pcibios_plat_dev_init() callback.
Also remove odd PCI dev configuration manipulation from pcibios_plat_dev_init()
callback.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42501
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Explicitly configure PCI host controller, and do not expose it to PCI
subsystem. The PCI host controller acts as a usual PCI device connected
to the bus, but its configuration as a usual PCI device is senseless,
since the host controller provide access to _internal_ memory space for
_external_ device.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42500
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- add comment, which briefly describes PCI controller features and
Fonera 2.0g schematics.
- rename several functions and structures, to make it clear that this
code only for AR2315 chips.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42499
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Caller (generic PCI code) already do proper locking so no need to add
another one here.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42498
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Remove options which already selected by ATHEROS_AR231X on which
ATHEROS_AR2315 depends.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42497
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- remove odd blank lines
- remove odd spaces after casts
- fix alignment
No functional changes.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42496
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- remove odd flags and branching
- add __init mark
- make shorter variables names
- returns true or false from boolean functions
- unwrap short function declarations
- unwrap quoted string
- rename macroses with names in CamelCase
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42495
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- use ether_foo() routines to work with addresses
- use ETH_ALEN inplace of magic '6'
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42494
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Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42493
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These IOCTLs handled in the core now.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42492
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Use mutex inplace of spinlock to make code simple, also call
mutex_{lock,unlock} explicitly to avoid sparse warning about context
imbalance.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42491
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- fill module metadata
- remove odd module_{init,exit}
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42490
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Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42489
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Remove useless void function return.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42488
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Remove FSF mailing address as suggested by checkpach and place license
URL.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42487
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as suggested by checkpach.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42486
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Make PCI IRQ handler and several structures static as suggested by
sparse.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42485
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Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42484
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Missing this headers cause several sparse "symbol 'foo' was not
declared. Should it be static?" warnings.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42483
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Avoid using of extern prototypes as suggested by checkpatch.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
SVN-Revision: 42482
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Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 42481
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Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 42476
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Targets were build tested and patches are refreshed.
Signed-off-by: Luka Perkov <luka@openwrt.org>
SVN-Revision: 42463
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 42460
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completed
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 42457
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Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com>
SVN-Revision: 42455
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Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 42452
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Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 42451
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This switches to kernel 3.10 that was prepared by Hauke in r41531 :
gemini: add support for kernel 3.10
This is compile tested only, please run test and report back.
I've simply checked if it still compiles, unfortunately we didn't get
any feedback for this target.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 42450
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It has been compile-tested only so far. Please give it a try.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 42449
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Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 42448
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Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 42447
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the old dwc_otg driver is starting to fall apart and fails on newer 3g
modems and some storage devices. switch to the upstream dwc2 driver which
is no longer in staging/.
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 42446
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Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 42445
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Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 42437
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Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
SVN-Revision: 42436
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While the AR9331 has a gigabit MAC towards the internal switch, the
integrated PHYs however are only 100-base-tx capable. The existing code
however advertieses gigabit capability in the link status word. If you
attach such a PHY to a gigabit capable switch on the remote end, with
some probability it attempts to negotiate gigabit and fails, falling
baco to the AR9331 assuming a 10mbit half-duplex link. This has been
observed quite frequently with the Carambola2 and gigabit capable
switches.
In ath79_register_eth(), "pdata->has_gbit = 1;" is set unconditionally
for both AR9331 ethernet ports. This is most likely wrong. Despite the
two MAC IP cores being gigabit MACs, the MAC for eth1 is connected to a
100base-T PHY via MII. The has_gbit attribute is used in the ethernet
driver to determine the supported link modes.
So either pdata->has_gbit is not set to 1 anymore, or the ethernet
driver needs to be modified to determine the advertised link code word
on another criteria than pdata->has_gbit. This patch implements the
former solution.
Signed-off-by: Harald Welte <laforge@gnumonks.org>
SVN-Revision: 42432
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(#13072)
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 42429
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 42428
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